User's Guide
Table Of Contents
- About This Book
- 1 Introduction
- 2 MPC837xE-RDS Board
- 2.1 Board-Level Functions
- 2.1.1 Reset and Reset Configurations
- 2.1.2 External Interrupts
- 2.1.3 Clock Distribution
- 2.1.4 DDR2 SDRAM Controller
- 2.1.5 Local Bus Controller
- 2.1.6 Flash Memory
- 2.1.7 I2C
- 2.1.8 SATA Controller
- 2.1.9 PCI Express Interface (PCI-E & Mini PCI-E)
- 2.1.10 10/100/1000 BaseT Interface
- 2.1.11 RS-232 Port
- 2.1.12 USB 2.0 Interface
- 2.1.13 PCI Subsystem
- 2.1.14 COP/JTAG Port
- 2.2 MPC837xE-RDS Assembly
- 2.3 Connectors
- 2.4 LEDs
- 2.5 MPC837xE-RDS Board Configuration
- 2.6 Specifications
- 2.7 Mechanical Data
- 2.1 Board-Level Functions
- 3 Board Bootup
- 4 MPC837xE-RDS Software
- 5 Unit Assembly
- MPC837xE-RDS
MPC837xE-RDS, Rev. 1.0
28 Freescale Semiconductor
Preliminary, Subject to Change without Notice
MPC837xE-RDS Board
9–15 COREPLL
[0–6]
01 0010 0 2:1 4
10 0010 0 2:1 8
11 0010 0 2:1 8
00 0010 1 2.5:1 2
01 0010 1 2.5:1 4
10 0010 1 2.5:1 8
11 0010 1 2.5:1 8
00 0011 0 3:1 2
01 0011 0 3:1 4
10 0011 0 3:1 8
11 0011 0 3:1 8
16–31 — Reserved. Should be cleared.
Table 7. Reset Configuration Word High (RCWH) Bit Descriptions
Bits Name Meaning Detailed Description
0 PCIHOST PCI host mode 0 PCI agent
1: Default PCI host
1 Reserved — Should be cleared
2 PCIARB PCI arbiter 0 PCI arbiter disabled
1: Default PCI arbiter enabled
3 Reserved — Should be cleared
4 COREDIS Core disable mode 0: Default e300 enabled
1 e300 disabled
5 BMS Boot memory space 0: Default 0x0000_0000–0x007F_FFFF
1 0xFF80_0000–0xFFFF_FFFF
6–7 BOOTSEQ Boot sequencer
configuration
00: Default Boot sequencer is disabled
01 Boot sequencer load configuration from I
2
C
10 Boot sequencer load configuration from EEPROM
11 Reserved
8 SWEN Software watchdog
enable
0: Default Disabled
1 Enabled
Table 6. RCWL Bit Descriptions (continued)
Bits Name Meaning Description