User's Guide

MPC837xE-RDS Board
MPC837xE-RDS, Rev. 1.0
Freescale Semiconductor 29
Preliminary, Subject to Change without Notice
9–11 ROMLOC Boot ROM interface
location
000 DDR SDRAM
001 PCI1
010 Reserved
011 On-chip Boot ROM
100 Reserved
101 Local bus GPCM, 8 bits
110: Default Local bus GPCM, 16 bits
111 Local bus GPCM, 32 bits
12–13 RLEXT Boot ROM location
extension
00: Default Legacy mode
01 NAND Flash mode
10 Reserved
11 Reserved
14–15 Reserved — Should be cleared
16–18 TSEC1M TSEC1 Mode 000 MII
001 RMII
010 Reserved
011: Default RGMII
100 Reserved
101 RTBI
110 SGMII
110 Reserved
19–21 TSEC2M TSEC2 Mode 000 MII
001 RMII
010 Reserved
011: Default RGMII
100 Reserved
101 RTBI
110 SGMII
110 Reserved
22–27 Reserved — Should be cleared
28 TLE True little endian 0: Default Big-endian mode
1 True little endian mode
29 Reserved — Should be cleared
Table 7. Reset Configuration Word High (RCWH) Bit Descriptions (continued)
Bits Name Meaning Detailed Description