DSP Core Reference Manual

ADDL1A
SC140 DSP Core Reference Manual A-33
Instruction Formats and Opcodes
Instruction Fields
rx rrrr AGU Source Register
Rx RRRR AGU Source/Destination Register
Instruction Words Cycles Type Opcode
15 8 7 0
ADDL1A rx,Rx 1 1 2 1110RRRR0000rrrr
0000 N0 0100 — 1000 R0 1100 R4
0001 N1 0101 — 1001 R1 1101 R5
0010 N2 0110 PC 1010 R2 1110 R6
0011 N3 0111 SP 1011 R3 1111 R7
Note: This instruction can specify R8-R15 as operands by using a high register prefix.
0000 N0 0100 — 1000 R0 1100 R4
0001 N1 0101 — 1001 R1 1101 R5
0010 N2 0110 — 1010 R2 1110 R6
0011 N3 0111 SP 1011 R3 1111 R7
Note: This instruction can specify R8-R15 as operands by using a high register prefix.