DSP Core Reference Manual

A-48 SC140 DSP Core Reference Manual
ASL
ASL Arithmetic Shift Left ASL
By One Bit (DALU)
Description
Status and Conditions that Affect Instruction
Status and Conditions Changed by Instruction
Example
asl d0,d1
Operation Assembler Syntax
Da << 1Dn
ASL Da,Dn
ASL Da,Dn
Shifts a source data register (Da) left one bit and stores the result in a destination data register (Dn). If the
source and destination registers are the same, the original value is destroyed, leaving the shifted value in
the register.
Note: The ASL instruction is mapped by the assembler to ADD Da,Db,Dn if Da is an even numbered data
register and ADD Da,Da,Dn if Da is an odd numbered data register.
Register Address Bit Name Description
SR[2] SM If set, selects 32-bit arithmetic saturation mode.
SR[5:4] S[1:0] Scaling mode bits determine which bits in the result are used in the
Ln bit calculation.
Register Address Bit Name Description
SR[0] C Bit Da[39] is stored in the carry bit.
Ln L If not in arithmetic saturation mode (SR [SM] = 0), calculates and
updates the Ln bit in the destination register. If in arithmetic
saturation mode (SR [SM] = 1), clears the Ln bit in the destination
register.
EMR[2] DOVF Set if the result cannot be represented in 40 bits, or if the result
saturates to 32 bits in arithmetic saturation mode.
Register/Memory Address Before After
D0
$ff f001 0001
L1:D1
$0:$ff e002 0002
0
01516313239C