DSP Core Reference Manual

MACR
SC140 DSP Core Reference Manual A-237
0.000 0000 1000$0080
x 0.000 0000 1000
$0080
0.000 0000 0000 0000 1000$000080000
+0.000 0000 0000 0111 0000
$0007
rnd0.000 0000 0000 0111 1000$00078
0.000 0000 0000 1000 0000
$0008
Instruction Formats and Opcodes
Note: ** indicates serial grouping encoding.
Instruction Fields
k Accumulation Notation
Da,Db JJJJJ Data Register Pairs
EMR
$0000 0000
Instruction Words Cycles Type Opcode
15 8 7 0
MACR ±Da,Db,Dn 1 1 1 0*1001FFFk0JJJJJ
15 8 7 0
MACR ±Da,Da,Dn 1 1 1 0*1010FFF1111k j j
0 add 1 subtract
00000 D0,D4 01000 D2,D4 10000 D0,D0 11000 D1,D2
00001 D0,D5 01001 D2,D5 10001 D0,D1 11001 D1,D3
00010 D0,D6 01010 D2,D6 10010 D0,D2 11010 D5,D6
00011 D0,D7 01011 D2,D7 10011 D0,D3 11011 D5,D7
00100 D1,D4 01100 D3,D4 10100 D4,D4 11100 D2,D2
00101 D1,D5 01101 D3,D5 10101 D4,D5 11101 D2,D3
00110 D1,D6 01110 D3,D6 10110 D4,D6 11110 D6,D6
00111 D1,D7 01111 D3,D7 10111 D4,D7 11111 D6,D7
Notes: 1. This instruction can specify D8-D15 as operands by using a prefix.
2. Register pair order can be inverted for clarity because the order of operation is not important
for multiply operations.
3. The JJJJJ encoding does not include the pairs: D1–D1, D3–D3, D5–D5, and D7–D7. These
are covered in the jj encoding.
Register/Memory Address Before After