DSP Core Reference Manual

OR.W

SC140 DSP Core Reference Manual A-345

Example

or.w #$f01a,(r1)

1111 0000 0001 1010

or 0001 0010 0011 0101

1111 0010 0011 1111

Instruction Formats and Opcodes

Instruction Fields

Rn RRR Address Register

Immediate

$F01A

$0000 0050

($0050)

$1235 $F23F

Instruction Words Cycles Type Opcode

15 8 7 0

OR.W #u16,(Rn) 2 2 3 00010001 i i i 01RRR

101iiiiiiiiiiiii

15 8 7 0

OR.W #u16,(SP–u5) 2 3 3 00000001 i i iAAAAA

101iiiiiiiiiiiii

15 8 7 0

OR.W #u16,(SP+s16) 3 3 3 00111001AAAi i 011

001AAAAAAAAAAAAA

10iiiiiiiiiiiiii

15 8 7 0

OR.W #u16,(a16) 3 2 3 00111001AAAi i 001

001AAAAAAAAAAAAA

10iiiiiiiiiiiiii

000 R0 010 R2 100 R4 110 R6

001 R1 011 R3 101 R5 111 R7

Note: This instruction can specify R8-R15 as operands by using a high register prefix.

#u16 iiiiiiiiiiiiiiii 16-bit unsigned immediate data

a16 AAAAAAAAAAAAAAAA 16-bit unsigned absolute address

u5 AAAAA0 Unsigned 5-bit SP address offset