DSP Core Reference Manual

A-390 SC140 DSP Core Reference Manual
SUB
Example 2
sub d0,d1,d2
Scaling up is set in SR[5], so L2 bit is set from overflow from bit 30.
Instruction Formats and Opcodes
Note: ** indicates serial grouping encoding.
L2:D2
$0:$FF FFFF FFFD
EMR
$0000 0000
Register/Memory Address Before After
D0
$FF D000 0000
D1
$00 2000 0000
SR
$00E4 0020 $00E4 0021
L2:D2
$1:$00 5000 0000
EMR
$0000 0000
Instruction Words Cycles Type Opcode
15 8 7 0
SUB #u5,Dn 1 1 1 0*1110FFF11 iiiii
15 8 7 0
SUB Da,Db,Dn 1 1 1 0*1011FFF00JJJJJ
15 8 7 0
SUB Db,Da,Dn 1 1 1 0*1011FFF01JJJJJ
15 8 7 0
SUB Da,Da,Dn 1 1 1 0*1000FFF11001 j j
Register/Memory Address Before After