DSP Core Reference Manual

2-44 SC140 DSP Core Reference Manual
Address Generation Unit
Note: The “—” that appears in the “R0-R7 Uses MCTL” heading means that it is not applicable for that
addressing mode.
Address Register Indirect
No Update, (Rn) No √ (Rn)
Post-increment, (Rn)+ Yes √ (Rn)+
Post-decrement, (Rn)– Yes √ (Rn)–
Post-increment by Offset Ni, (Rn)+Ni Yes √ (Rn) + Ni
Indexed by offset N0, (Rn+N0) Yes √ (Rn + N0)
Indexed by Address Register Rm,
(Rn+Rm)
Yes √ (Rn + Rm)
Short Displacement, (Rn+x)
Word Displacement, (Rn+xxxx)
Yes √ (Rn + x)
(Rn + xxxx)
SP Short Displacement, (SP-xx) — √√(SP - xx)
SP Word Displacement, (SP+xxxx) — √√(SP + xxxx)
PC Relative
PC Relative with Displacement — √ #xx (8 bits)
#xxx (10 bits)
#xxxx (16 bits)
#xxxxx (20 bits)
Special
Immediate Short Data
Immediate Word Data
Immediate Long Data
— √ #xx (5, 6, or 7bits)
#xxxx (16 bits)
#xxxxxxxx(32 bits)
Absolute Word Address
Absolute Long Address
— √ xxxx (16 bits)
xxxxxxxx (32 bits)
Absolute Jump Address — √ xxxxxxxx (32 bits)
Implicit Reference — √√ √
Table 2-20. Addressing Modes Summary (Continued)
Addressing Modes
R0-R7
Uses
MCTL
Operand Reference
Assembler Syntax
SCDAPX