DSP Core Reference Manual

Memory Interface
SC140 DSP Core Reference Manual 2-59
Figure 2-22. Data Transfer in Big and Little Endian Modes
For single-register moves, assuming an equivalent memory map in big and little endian modes, the byte
organization on the buses is identical in both modes. However, the memory subsystem must route the data
bus bytes to different memory addresses for each supported endian mode.
Big Endian
Little Endian
MOVE.B (A0), D0
MOVE.B (A2), D0
MOVE.W (A8), D0
MOVE.L (A16), D0
xxxx xxxx xxxx xx0a
xxxx xxxx xxxx xx0c
xxxx xxxx xxxx 0102
xxxx xxxx 1122 3344
64-bit XB-BUS
64-bit XA-BUS
SC140 Core
Memory
Instructions Data Bus Contents
8
16 ($10)
24 ($18)
32 ($20)
01
2
34567
0
0a 0b 0c 0d 0e 0f
01 02 03 04 05 06 07 08
11 22 33 44 cc dd ee ff
0
8
16 ($10)
24 ($18)
32 ($20)
76543210
0f 0e 0d 0c 0b 0a
07 08 05 06 03 04 01 02
cc dd ee ff 11 22 33 44