Dimmable Light Ballast with Power Factor Correction Designer Reference Manual M68HC08 Microcontrollers DRM067 Rev. 1 12/2005 freescale.
Dimmable Light Ballast with Power Factor Correction Designer Reference Manual by: Petr Frgal Freescale Czech Systems Center Roznov pod Radhostem, Czech Republic To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify that you have the latest information available, refer to http://www.freescale.com Dimmable Light Ballast with Power Factor Correction, Rev.
Dimmable Light Ballast with Power Factor Correction, Rev.
Contents Chapter 1 Introduction 1.1 1.2 1.3 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Benefits of this Solution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 The MC68HC908LB8 Microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Chapter 2 Control Theory 2.1 2.1.1 2.1.2 2.1.3 2.2 2.2.
Chapter 5 Software Design 5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2 Control Algorithm Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2.1 Power Factor Correction Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.2.1.1 DC-bus Voltage Control . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1 Introduction 1.1 Introduction This reference design describes the design of a fully digital dimmable light ballast with power factor correction (PFC) control for two parallel connected fluorescent lamps. This reference design focuses on the lamp ballast hardware and software implementation using the Freescale MC68HC908LB8 microcontroller (MCU), which is designed specifically for light ballast applications.
Introduction • • • • • • Energy saving Ease of adapting software for different lamps Ease of re-programming the system behavior Software can simplify the hardware Diagnostic functions — fault state, tube end-of-life, ignition fault, tube removed Open to innovation The MC68HC908LB8 is designed for light ballast applications. It contains a HRP that is assigned to control a lamp ballast circuit using half-bridge topology. The HRP provides two complementary outputs for controlling a half-bridge drive.
The MC68HC908LB8 Microcontroller • • • • • • • • • • • • • • • • • • Dual channel high resolution PWM (HRP) with deadtime insertion and shutdown input to perform light control and dimming functions for ballasts. The outputs use frequency dithering to achieve a 3.9 ns output resolution.
Introduction Dimmable Light Ballast with Power Factor Correction, Rev.
Chapter 2 Control Theory 2.1 Introduction This chapter covers fluorescent lamp theory and two PFC concepts - discontinuous conduction mode and hysteresis current control mode. 2.1.
Control Theory Figure 2-1. Typical Low Pressure Fluorescent Tube I/V Characteristic The value of Vstrike is a function of several parameters: • Gas filling mixture • Gas pressure and temperature • Tube length • Tube diameter • Temperature of electrodes: cold or hot Typically, values of Vstrike are in range 500 V to 1200 V. Once the tube is on, the voltage across it drops to the on-state voltage (Von), the magnitude of this voltage being dependent upon the characteristics of the tube.
Introduction Figure 2-2. Typical Fluorescent Tube Equivalent Circuit in Steady State Up to now, there is no model available to describe the start up sequence of these lamps. However, since most of the phenomena are dependent upon the steady state characteristics of the lamp, one can simplify the analysis by assuming that the passive networks control the electrical behavior of the circuit.
Control Theory The operation of a fluorescent tube requires several components around the tube, as shown in Figure 2-3. The gas mixture enclosed in the tube is ionized by means of a high voltage pulse applied between the two electrodes. To make this startup easy, the electrodes are actually made of filaments that are heated during the tube ionization startup (i.e. increasing the electron emission), their disconnection being automatic when the tube goes into the steady state mode.
PFC Control Theory power, battery operated fluorescent tubes are driven with a single switch fly-back topology, but, the output transformer is coupled to the tube by a capacitive network and the current through the lamp is alternating current. However, the filaments (if any) cannot be automatically turned off by this simple configuration and the global efficiency is downgraded accordingly.
Control Theory 2.2.2 Digital Power Factor Concept — Hysteresis Current Control Mode The control technique is based on hysteretic current control. The system operates in continuous conduction mode with variable switching frequency (30–100 kHz) (see Figure 2-5). This PFC concept is designed to have the minimum of MCU performance requirements. The basic principles of the scheme are depicted in Figure 2-4.
PFC Control Theory Figure 2-5. Hysteresis Current Control Mode Current Waveform 2.2.3 Digital Power Factor Concept — Discontinuous Conduction Mode The control technique is based on discontinuous conduction mode with a current loop with a constant switching frequency (40 kHz) (see Figure 2-7). The basic principles of the scheme are depicted in Figure 2-6. The PFC control algorithm includes two control loops, the same as the previous approach.
Control Theory DC Bus Voltage L Reference Voltage AC Zero Crossing + DC BUS Comparator ADC + PWM0 IC + - AC LINE MCU Actual Current DC MOSFET PWM FAULT PIN PWM1 GND Current Sensing Figure 2-6. Discontinuous Conduction Mode Principle Figure 2-7. Discontinuous Conduction Mode Current Waveform Dimmable Light Ballast with Power Factor Correction, Rev.
PFC Control Theory Figure 2-8. Generated Input Current Waveform 2.2.4 Concept Summary Both the PFC solutions can be used for applications that do not require a large portion of the MCU’s resources, because they consume only a fraction of the MCU performance. Compared to a dedicated IC solution, digital PFC offers high flexibility and cost reduction in the overall design, as the PFC function can be provided within the MCU capability of the main application.
Control Theory Dimmable Light Ballast with Power Factor Correction, Rev.
Chapter 3 Reference Design 3.1 Application Outline The presented system is designed to control two parallel connected fluorescent lamps.
Reference Design Table 3-1. Light Ballast Characteristics Parameter Unit Lamp Type Value F18W/33 Input Power W 8...31 Input Current (230VAC) mA 40...290 Preheat Output Frequency kHz 86 Preheat Output Voltage Vpp 345 Preheat Time ms 900 Running Output Frequency Range kHz 50...100 Running Output Voltage Range V 200...235 Input AC Voltage VAC 110V/60Hz, 230/50Hz Ambient Temperature Range °C 0.50 Power Factor 0.94...0.99 Total Harmonic Distortion % 5.2...24.
Application Description MAINS RECTIFIER DC-BUS VOLTAGE CONTROL BOARD POWER SUPPLY PWM DRIVER ACTUAL CURRENT DIFFERENTIAL VOLTAGE FILTER PWM - + PWM GENERATION UREQ HIGH RESOLUTION PWM USER INTERFACE MONITOR MODE sineGain e f HRP PI REGULATOR TUBE 2 CURRENT ZERO CROSSING DRIVER RESONANT CIRCUIT TUBE 1 CURRENT FILTER FLUORESCENT LAMPS PFC HALF BRIDGE DC-BUS PI REGULATOR LUMINANCE LEVEL e BRIGHTNESS LINEARIZATION ireq - iact CURRENT PROCESSING e MC68HC908LB8 Figure 3-1.
Reference Design the PFC switch in hysteresis current control mode or output is used for switch off PWM1 in DCM. Than PWM1 signal is used directly for switching the PFC switch transistor. 3.3.3 Protection Features During the startup phase and run phase, some erroneous states can occur. When the DC-bus voltage does not reach the required value or is out of limits then a fault signal is generated. The DC-bus voltage is also checked against limits in run mode.
Chapter 4 Hardware Design 4.1 Hardware Implementation This chapter covers the system hardware implementation. The dimmable light ballast board is shown in Figure 4-1. Figure 4-1. Dimmable Light Ballast - Demo Board 4.2 System Modules The light ballast system hardware is shown in the block diagram in Figure 4-2. It incorporates the controller board, powered from AC line and fluorescent tubes.
Hardware Design Figure 4-2. Dimmable Light Ballast with Hysteresis PFC HW variation — Hardware Block Diagram 4.2.1 Input and PFC The input and the PFC part provide the DC-bus voltage to supply the inverter. The schematic for hysteresis current control mode is shown in Figure 4-3. The difference in discontinuous conduction mode against hysteresis mode is that the gate of Q4 is connected to pin PWM1 of the MCU (see Figure A-2), not to the output of the comparator.
System Modules signal of the comparator (Comp Out) controls the power switch Q1 through the output buffer, which consists of transistors Q2, Q3, and Q4, resistors R10, R13, R34, R35, R36, and R37, and capacitor C7. For discontinuous conduction mode the comparator output is disconnected from the Q4 transistor gate. The PWM1 pin is connected to the Q4 transistor gate. Digital PFC is driven by the MCU.
Hardware Design 4.2.2 Inverter The power inverter generates the proper voltage for the fluorescent tubes. The power inverter consists of two MOSFET transistors driven by a half-bridge driver. It incorporates the half-bridge, a resonant circuit, different voltage and tube current sensing, and output inductance circuity. The half-bridge driver IR2106 from International Rectifier is electrically connected according to the manufacturer’s recommendations. The half-bridge is supplied from the DC-bus voltage.
System Modules O1 O2 O3 O4 O5 O6 O7 O8 J2 TUBE Connector HALF BRIDGE 1 2 3 4 5 6 7 8 OUTPUT INDUCTANCE CIRCUITY DCB 2 7 5 D4 GND 4 Q5 IRF830A 4 R15 10R D3 5 C26 10nF 630V TC356 15V/1 D MURA160 L7 RES5 1mH D 1 IR2106 R18 33R G Q6 S IRF830A 3 C14 470pF 1KV 1 5 1 8 1 C15 8n2 1KV L3A R17 2 6 DIFF8 3 L3D 4 2 6 C12 100nF 630V 1 L4D L5C HEAT7 HEAT6 10K DIFF8 2 1 C13 1uF 25V L5D HEAT6 GND 1 C11 100nF L4C HEAT7 C28 470pF 1KV 2 8 7 6 5 2 VB HO Vs LO L4B HEAT7
Hardware Design 4.2.3 Microcontroller The MC68HC908LB8 microcontroller is the core of the application. It processes the input and feedback signals and generates appropriate control signals. The description of the pins follows. The inverter is controlled by signals on the TOP and BOT pins of the MCU. Signal PWM0 is used to generate a sine wave. This signal (on comparator pin V+) is compared with the real current (on comparator pin V-) in the on-board comparator.
System Modules 5V 5V R28 D11 1K8 LED R26 1K R33 10K TOP R260 IC2 6 7 8 9 10 11 12 13 R38 N/P Comp Comp Out 3 4 5 Zero Detect 14 15 16 17 18 19 20 PTB0/TOP PTA0/ADC0/KBI0 PTB1/BOT PTA1/ADC1/KBI1 PTB2/FAULT PTA2/ADC2/KBI2 PTB3/PWM0 PTA3/ADC3/KBI3 PTB4/PWM1 PTA4/ADC4/KBI4 PTB5/V+ PTA5/RST/KBI5 PTB6/VPTA6/ADC5/TCH0/KBI6 PTB7/VOUT/ADC6/FAULT PTC0/OSC1 PTC1/OSC2 PTC2/SHTDWN/IRQ VDD VSS Serial Data DCB Divider Tube Current 1 Tube Current 2 Tube Voltage difference 1 2 2 R27 1K BOT 0R 1 MC68HC
Hardware Design Table 4-2. J2 Interface Header Pin number Signal 1 +5V 2 PTC2 3 PTC0 4 PTA0 5 GND 6 PTA1 Dimmable Light Ballast with Power Factor Correction, Rev.
System Modules 4.2.4 Power Supply The function of the switch mode power supply (SMPS) is to feed the inverter and output buffer circuit with 15 V and to supply the microcontroller stage by 5 V (see Table 4-3). The SMPS is supplied from the DC-bus voltage. It uses the monolithic high-voltage regulator NCP1010 from ON Semiconductor connected as recommended by the manufacturer. It can provide 15 VDC @ 100 mA.
Hardware Design Dimmable Light Ballast with Power Factor Correction, Rev.
Chapter 5 Software Design 5.1 Introduction This section describes software features and behavior of the software in all function modes. The software is described in terms of: • Control Algorithm Description • Software Implementation • Detailed Software Description • Microcontroller Usage • Constant and Variable Definitions 5.2 Control Algorithm Description The application performs dimmable light ballast for fluorescent lamp control and PFC control. It uses microcontroller built-in peripherals.
Software Design 5.2.1 Power Factor Correction Control PFC control consists of DC-bus voltage control using the PI controller, phase shift synchronization, reference sine wave generation and generation of output PFC control signals. It also includes the trimming of the internal oscillator frequency according to the frequency of the mains provided. 5.2.1.1 DC-bus Voltage Control The actual value of the DC-bus voltage is sensed by the AD converter. This value is compared with the required DC-bus value.
Control Algorithm Description is higher than the generated sine waveform, then the comparator output is in log.1 and PWM1 is switched off. This happens every PWM period and this process is called cycle by cycle limiting. PWM1 operates at a 40 kHz frequency with variable duty cycle. For safety reasons, the comparator is enabled when the microcontroller is initialized and mains voltage synchronization is provided. 5.2.2 Light Ballast Control Light Ballast Control controls the fluorescent tubes.
Software Design level adjustment (brightness linearization). The regulation error is then the input value for the PI regulator. The output value from the PI regulator is the HRP period for half bridge power stage. Input required luminance level adjustment adapts the required luminance level to its exponential value. This is done because of the nonlinear function dependence of luminance on the lamp current. The transformation table is used. The table contains the required current values.
Software Implementation 5.3 Software Implementation The general software implementation is illustrated in Figure 5-3. It incorporates the main routine entered from Reset and three interrupt states. The main routine includes the initialization of the microcontroller including PWM, HRP, ADC, and pins used in the application, and sets initial values for the PI regulator. The infinite loop is performed as long as board remains connected to the mains and no fault conditions are detected.
Software Design • • • • The register CONFIG2 sets: – internal oscillator – IRQ interrupt enabled – IRQPUD must be 0 to connect the internal pullup resistor between IRQ pin and Vdd. IRQ status and control register INTSCR sets: – IMASK enable IRQ interrupt requests – IRQ interrupt on falling edge only Analog to digital converter clock register (ADCLK) – sets the ADC clock. ADC clock = bus clock / prescaler. The recommended value for the ADC clock is 1 MHz.
Software Implementation • • – PWM clock frequency set to BUSCLK by prescaler bits PRSC0 and PRSC1 DISMAP is a write-once register which controls the PWM pins to be disabled if an external fault occurs. When this register is written for the first time, it cannot be rewritten unless a reset occurs. PWM0 is not disabled when an external fault appears. PWM1 is disabled if an external fault appears. The FCR register controls the fault protection circuitry.
Software Design For BUSCLKX2 = 8 MHz, the HRPDT= $08 3. Set HRPPERH:HRPPERL to select the desired frequency (e.g. 88 kHz) The period of 88 kHz = 1/88 kHz Output period (seconds) = HRPPERH:HRPPERL / (BUSCLKX2 * 32) then, HRPPERH:HRPPERL = 1/88 kHz * (internal bus frequency * 32) = 2909 = $B5D 4. Select variable frequency mode and start the HRP Writing $01 to the HRPCTRL register configures the module for variable frequency mode (HRPODE = 0) and enables the module (HRPEN = 1). 5.3.
Software Implementation 5.3.3 Synchronization Interrupt Routine The interrupt procedure is used for trimming the internal oscillator and for synchronization of the phase shift of the reference sine wave with the mains voltage. A detailed illustration of this is shown in Figure 5-4.
Software Design interrupt void pwmISR(void) Read new (PWM value from table * sineGain) Increment of table index Was end of sine tab. reached ? yes Table index = 0 no Increment 500us counter Has 500us gone ? yes Enable PI ballast stage regulator computing and reset 500us counter no Increment 1ms counter Has 1ms gone ? yes Set 1ms flag and reset 1ms counter no Reset LDOK to enable new PWM reload and clear reload flag End of subroutine Figure 5-5.
Software Implementation 5.3.4.1 Fault Detection and Processing The following application faults are detected by the software: • DC-bus under voltage • DC-bus over voltage • Failure of the DC-bus voltage to reach the required value within the start time • Zero current fault • Ignition fault • COP overflow A zero current fault launches the faultISR routine when one of the tube currents is zero during the zero current checking interval in run mode for the specified time.
Software Design interrupt void timovISR(void) interrupt void faultISR(void) Disable all interrupts Stop timer and enable timer overflow interrupts Stop HRP Disconnect internal comparator from pins and powered off Set Vout(PTB7) pin as an output and set it to log. 1 Stop PWM 1 Blink fault diode Figure 5-6. Flow Chart — timovISR and faultISR 5.4 Detailed Software Description This section provides a detailed graphical description of the software.
Detailed Software Description RESET Set configuration registers CONFIG1, CONFIG2 Set IRQ register (INTSCR): falling edge, enable IRQ interrupt request Wait for a moment to stabilize internal oscillator Disable all interrupts Set PWM : - reset sine tab. pointer - PMOD = PWM_MODULUS - PVAL0 = 0, PVAL1 = 0; - PCTL2 - reload cycles PWM prescaler, negative polarity, disable PWM1, enable PWM0 - DISMAP - disable PWM1 if ext.
Software Design 2 Measure DC-BUS voltage Is DCM HW variation selected ? Actual DC-BUS voltage > maximum allowed DC-BUS voltage ? yes yes phase 1 - Reach DC-bus voltage PVAL1 = DUTY_CYCLE_MAX; faultISR() no no no Required DC-BUS voltage = DC-BUS run voltage Actual DC-BUS voltage < DC-BUS start voltage ? yes Set maximum ballast frequency and time interval Is enabled PI PFC stage regulator calculation ? Enable HRP yes no Has time interval for keep maximu m frequency gone ? Increment required DC
Detailed Software Description 3 Is preheat frequency reached? Has 1ms gone? no yes Has 1ms gone? Decrement ballast frequency by ramp step frequency yes yes Decrement ballast frequency by ramp step frequency Is min.
Software Design 4 Run mode Set Dimming value and Dimming value array to minimal value Has 1ms gone? Set zero current checking interval counter (currFltMS) yes Is time to measure Dimming value ? Set values of PI PFC stage regulator for run mode: - proportionalGain = PI_KP_RUN; - integralGain = PI_KI_RUN; yes Get dimming value and compute moving avg.
Microcontroller Usage 5.5 Microcontroller Usage 5.5.1 Microcontroller Peripheral Usage 5.5.1.1 High Resolution PWM (HRP) The HRP controls the ballast half-bridge power stage. The module is configured for frequency mode (constant 50% duty cycle, variable frequency, deadtime). For setting up the module, the worksheet HRP_Setup in file DLB_Setup.xls can be used (see Reference [4]). 5.5.1.2 Pulse-Width Modulator (PWM) The PWM modulator is used to generate the reference sine wave for PFC control by PWM signal.
Software Design 5.5.3 I/O Usage Table 5-2 summarizes the use of the I/O pins. Table 5-2.
Definitions of Constants and Variables 5.6.1 System Setup Definitions The following constants can be used to set up the system behavior, according to required conditions. 1. #define HW_VAR HYST ...defines HW variation - hysteresis current control mode (HYST) or discontinuous conduction mode (DCM). 2. #define INP_VOLT U110V ...defines input voltage lower (U110V) or higher (U230V) than half of DC-bus voltage. 3. #define INPVOLTFREQ 50 ...defines the mains voltage frequency as 50 Hz or 60 Hz. 4.
Software Design 22. #define MIN_IGNITION_FREQ 45 ...defines the minimum HRP frequency in kHz. 23. #define MAX2PREHEAT_RAMP 100 ...represents the number of frequency steps between the maximum HRP frequency and the preheat HRP frequency. 24. #define IGNITION_RAMP 2000 ...represents the number of frequency steps between preheat HRP frequency and ignition HRP frequency. 25. #define MIN_RUN_HRP_FREQ 50 /*see DLB_setup.xls */ ...defines the minimum HRP frequency in kHz during run mode. 26.
Definitions of Constants and Variables 44. 45. 46. 47. 48. 49. ...represents the integral gain of the PI PFC stage regulator in run mode. #define PI_SCALE 0 ...represents the scaling factor of the PI PFC stage regulator (2^scale). #define PI_MIN_VAL 0 ...represents the minimum value of the PI PFC stage regulator output. #define PI_MAX_VAL 255 ...represents the maximum value of the PI PFC stage regulator output. #define PI_KP_RUNI 2 ...
Software Design 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25. 26. 27. for timing 1 ms intervals. extern tU08 curr_T1; This variable represents the current in tube 1. extern tU08 curr_T2; This variable represents the current in tube 2. extern tU08 avg_CurrentT1T2; This variable represents the average value of the tube currents. extern tU16 mscounter; This variable counts 1 ms intervals. It is incremented every 1 ms. It is used for application timing.
Chapter 6 Demo Setup WARNING This circuit is powered directly from the mains voltage supply. It is dangerous to touch any part of the circuit. When working with such circuits, do not connect any scope or development system without using an isolation transformer. 6.1 Hardware Setup This section describes the setup and operation of the light ballast demo. Since the tubes are an integral part of the application, the whole demo system is considered. A photograph of the demo is shown in Figure 1-1.
Demo Setup • • • Discontinuous conduction mode for 50 Hz and for input voltage higher than half of DC-Bus voltage — DCM50HzH.s19 Discontinuous conduction mode for 60 Hz and for input voltage lower than half of DC-Bus voltage — DCM60HzL.s19 Discontinuous conduction mode for 60 Hz and for input voltage higher than half of DC-Bus voltage — DCM60HzH.s19 For reprogramming the microcontroller you have the choice of serial bootloader or MON08 Cyclone.
Appendix A. Schematics and Part List A.1 Schematics Dimmable Light Ballast with Power Factor Correction, Rev.
2.
2.
1 2 3 4 5 6 7 8 O1 O2 O3 O4 O5 O6 O7 O8 J2 TUBE Connector DCB 2 7 5 D4 GND 4 Q5 IRF830A 4 R15 10R D3 5 C26 10nF 630V TC356 15V/1 D MURA160 BZG05C22 R16 33R 1 IR2106 R18 33R G Q6 S IRF830A 3 L7 RES5 1mH C14 470pF 1KV 1 1 D 2 1 5 1 8 2 1 C15 8n2 1KV L3A R17 2 6 4 3 DIFF8 6 L3D L4D L5C HEAT7 HEAT6 10K DIFF8 D5 7 2 R152 0R L5B HEAT6 D8 BAT48 Tube Current 1 GND R19 20R 0.
5V 5V R28 D11 1K8 LED R26 1K R33 10K TOP R260 IC2 6 7 8 9 10 11 12 13 BOT R38 N/P Comp Comp Out 3 4 5 Zero Detect 0R 14 15 16 17 18 19 20 PTB0/TOP PTA0/ADC0/KBI0 PTB1/BOT PTA1/ADC1/KBI1 PTB2/FAULT PTA2/ADC2/KBI2 PTB3/PWM0 PTA3/ADC3/KBI3 PTB4/PWM1 PTA4/ADC4/KBI4 PTB5/V+ PTA5/RST/KBI5 PTB6/VPTA6/ADC5/TCH0/KBI6 PTB7/VOUT/ADC6/FAULT PTC0/OSC1 PTC1/OSC2 PTC2/SHTDWN/IRQ VDD VSS Serial Data DCB Divider Tube Current 1 Tube Current 2 Tube Voltage difference 1 2 2 R27 1K C19 100nF 25V 1 MC68HC90
5V 5V 5V R28 D11 R12 10K 1K8 LED R26 1K R33 10K TOP R260 IC2 6 7 8 9 10 11 12 13 R38 N/P PWM1 Comp - 3 4 5 Zero Detect 14 15 16 17 18 19 20 PTB0/TOP PTA0/ADC0/KBI0 PTB1/BOT PTA1/ADC1/KBI1 PTB2/FAULT PTA2/ADC2/KBI2 PTB3/PWM0 PTA3/ADC3/KBI3 PTB4/PWM1 PTA4/ADC4/KBI4 PTB5/V+ PTA5/RST/KBI5 PTB6/VPTA6/ADC5/TCH0/KBI6 PTB7/VOUT/ADC6/FAULT PTC0/OSC1 PTC1/OSC2 PTC2/SHTDWN/IRQ VDD VSS Serial Data DCB Divider Tube Current 1 Tube Current 2 Tube Voltage difference 1 2 2 R27 1K BOT 0R 1 MC68HC908L
22uF 35V 2 DCB TL-RAD EZK L8 4.7mH IC3 4 D12 MURA160 + 2 C23 1uF 450V 2 1 NCP1010-SOT223 + GND C24 1 2 5V 2 VCC FB GND DRAIN 15V GND U3 C21 100uF 35V 1 1 2 3 1 + C20 1 C22 1uF 25V GND 15V/1 4 1 3 2 1nF 25V D14 BZV55C13 GND R32 390R D13 BZV55C5V1 2 SFH6106 1 GND GND Figure A-6.
A.2 Parts List Table A-1. Printed Circuit Board Parts List DESIGNATORS C1 C2 C3,C26 C4 C5 C6,C7,C9,C11,C19 C8 C10,C25 C12 C13,C22 C14,C28 C15 C16,C18 C17 C20 C21 C23 C24 C27 QUANTITY 1 1 2 1 1 5 1 2 1 2 2 1 2 1 1 1 1 1 1 DESCRIPTION 10nF/275V X2 150nF/275V X2 10nF/630V TC356 22 µF/450V 4.7nF 250/1000V 100nF ceramic 0805 82pF ceramic 0805 220nF ceramic 0805 100nF/630V 1µF 470pF/1000V 8.2nF/1000V 22nF ceramic 0805 6.8nF ceramic 0805 22µF/35V 100µF/35V 1µF/450V 1nF ceramic 0805 1.
Table A-1. Printed Circuit Board Parts List (Continued) DESIGNATORS L7 L8 QUANTITY 1 1 Q1 1 Q2 Q3 1 1 Q4 1 Q5,Q6 2 RV1 R1,R2 R3,R5,R7 1 2 3 R4 1 R6 R8 R9 R10 R11 R12, R20,R25,R33 R13 R14 R15 R16 R17 R18 R19,R23 R21 R22 R24 R26,R27 R28 R29 R30 R31 R32 R34,R150,R151, R152,R260 R35,R36,R37,R39 R38 U1 U3 1 1 1 1 1 4 1 1 1 1 1 2 1 1 1 2 1 1 1 1 1 DESCRIPTION 1mH 4.
Dimmable Light Ballast with Power Factor Correction, Rev.
Appendix B. References 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. Electronic Lamp Ballast Design (AN1543/D), Motorola 1995 MON08 Cyclone User Manual, P&E Microcomputer Systems Inc. 2002 Opto-isolation Board User Manual, Freescale 2005 DLB_Setup.xls — HRP_Setup Excel sheet DLB-LB8-001.mcp — project, debugger under CodeWarrior CW V3.0 Developer’s Serial Bootloader for MC68HC08 (AN2295/D), Motorola 2002 MC68HC908LB8 data sheet, Freescale 2004 Freescale web page: http://www.freescale.
Dimmable Light Ballast with Power Factor Correction, Rev.
How to Reach Us: Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.