9HUVLRQ FUJITSU MICROELECTRONICS EUROPE Development tools for 16LX Family CPU Board User Guide
DEVELO P M ENT TO O LS F O R 16LX F AM I LY &38 %RDUG 8VHU *XLGH
7DEOH RI &RQWHQW What is in This Guide ...............................................................................................................................................................................................................2 What is not included in this guide .....................................................................................................................................................................................
&KDSWHU :KDWLV LQ 7KLV*XLGH What you’ll find inside this guide and few words about its organization C PU Board in its interface to the Devkit16 Mainboard is designed in such a way that it is possible to use different CPU boards (with various members of the 16LX family) with the same Mainboard. This guide describes how to use the CPU board as a standalone board.
: + ( 5 ( & 3 8 7 2 ) , 1 ' % 2 $ 5 ' 6 1 ( : 6 / $ 7 ( 6 7 2 3 7 , 2 1 6 ) $ 4 $ 1 ' 2 7 + ( 5 % ( $ 1 6 2 7 + ( 5 6 8 3 3 2 5 7 Please visit DevKit16 WEB site www.processorexpert.com/devkit16 for news and giveaways. You can also register in order to obtain news by mail. For MCUs and Fujitsu http://ww.fujitsu-fme.com.
&KDSWHU &38 %RDUG )HDWXUHV DQG 7HFKQLFDO 6SHFLILFDWLRQ This chapter introduces features of CPU board and provides necessary technical and operational information for DevKit16. T he CPU board was designed as a replaceable part of the Devkit16. So, it contains only few features and the rest is provided by the Devkit16 Mainboard.
&KDSWHU )ODVK ,W If the CPU mounted on the CPU board has a FLASH memory, the DevKit16 FLASH Programming Tool can be used to program it. 29(59,(: 2) 7+( '(9.,7 )/$6+ 352*5$00,1* 722/ DevKit16 FLASH Programming Tool provides standard operations (check/program/verify) for CPU Internal FLASH memory, Mainboard FLASH or both. With the standalone CPU board, it is possible to program only the internal FLASH.
&KDSWHU &38 %RDUG 'HVFULSWLRQ This chapter provides detailed description of CPU board including all DIP switches, jumpers and connectors. CPU board can work standalone or in connection with the Mainboard. If the Mainboard is in use, please switch all switches on CPU board configuration DIP to OFF. &38 %2$5' 29(59,(: CPU board is designed as low cost board, which provides compatibility on Interface Bus and the Device Bus level for different CPUs.
. &38 6HULDO LQWHUIDFH FRQQHFWRU AD00 1 2 AD01 MD0 3 4 MD2 SERRES 5 6 SIN SOT 7 8 SCK VCC 9 10 GND The serial interface connector should be used only when the CPU board is not connected to the mainboard, because mainboard connects its own serial (RS232) interface to the UART0 and UART1 CPU signals. To be able to use the K7 connector, please refer to the description of J7, J8, J9 jumpers later in this section.
. . . . &38 SLQV FRQQHFWRUV . . A16 2 A17 INT6 31 32 INT7 A18 4 A19 ADTG 33 34 AVCC A20 6 A21 AVR+ 35 36 AVR- A22 8 A23 AVss 37 38 AN0 10 #RD AN1 39 40 AN2 12 #WRL AN3 41 42 Vss #WRH 14 HRQ AN4 43 44 AN5 #HAK 15 16 RDY AN6 45 46 AN7 18 SOT0 TIN0 47 48 TOT0 SCK0 19 20 SIN0 MD0 49 50 MD1 SIN1 21 22 SCK1 FVCC 23 24 SOT1 SOT2 25 26 SCK2 SOT2 25 26 SIN2 INT4 25 26 INT5 ALE GND CLK 17 . MD2 51 .
- 8 0 3 ( 5 6 % 8 7 7 2 1 6 $ 1 ' 6 : , 7 & + ( 6 - 6XSSO\ IRU WKH ZKROH ERDUG When SHORT, the +5V from the voltage regulator is connected to board VCC. This jumper must be removed when using an external +5V power supply to avoid current flowing back to the regulator. - 6XSSO\ IRU &38 When SHORT, the VCC is connected to CPU’s VCC pins. Before removing this jumper, remove the J3 (AVCC to CPU) jumper as well to completely disconnect the power from the CPU.
& VRIWZDUH HPXODWLRQ MXPSHUV - - , These jumpers allow to use Mainboard’s I2C connector/EEPROM memory even in the case, when CPU itself doesn’t provide the I2C interface. When both of these jumpers are SHORT, the CPU’s HRQ signal is connected to the Mainboard’s SDA signal (via J19) and #HAK signal is connected to SCL signal. An user can then program the #HAK, HRQ signals to behave as I2C interface. - - /RZ VSHHG ;7$/ MXPSHUV When short, these jumpers connect the 32.
4: S-R – if ON, this switch connects the RES pin of the K7 connector to the CPU’s #RST signal. 5: S-H – if ON, this switch connects the RES pin of the K7 connector to the CPU’s #HST signal. 6. H-R – if ON, the #RST and #HST signals are connected together. 7: AD00, 8:AD01 – if ON, the AD00/P00 and AD01/P01 signals are pulled to log. ‘0’ level. This setting must be done for bringing processor to the Serial programming mode.
'()$8/7 +: 6(77,1*6 These jumpers come in the SHORT position as a default factory setting: J2: The CPU is connected to the +5V power supply through this jumper J3: The CPU AVCC supply pin is connected +5V power supply through this jumper J4: The CPU AGND supply pin is connected to the GND through this jumper J5: The CPU AVR+ pin is connected to the +5V voltage through this jumper J6: The CPU AVR- pin is connected to the 0V voltage through this jumper J7-9: The CPU UART1 signals are connected to the K7 conn
&KDSWHU &38 %RDUG 3RZHU 6XSSO\ 5HTXLUHPHQWV CPU board does not come with power supply, please check, if your power supply match the requirements before you plug it to the CPU board! Power supply voltage: 9V Power supply current (CPU board MB90F543 with Main board connected): Single chip CPU mode, no external peripheral connected: 290mA max.
&KDSWHU :DUUDQW\ DQG 'LVFODLPHU To the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH restricts its warranties and its liability for the DEVKIT16 and all its deliverables (eg. software, application examples, target boards, evaluation boards, etc.
&KDSWHU 5HYLVLRQ DQG (UURU /LVW The following bugs have been found with the board and need to be observed when working with this tool: Date Revisions - Errors 05.11.1999 13.02.2000 Version 1.2 is valid for CPU Board ver. 1.3 The table “Device Bus (K2) and Interface Bus (K1 ) connectors pins” (pages 16, 17, 18) was not consistent with the schematics. Table1: List of found errors and revisions for version V1.2 Revised Version V1.2 V1.
&KDSWHU $SSHQGL[ Here you will find Interface bus and Device Bus description and CPU board schematics. 'HYLFH %XV . DQG ,QWHUIDFH %XV . FRQQHFWRUV SLQV DIN Conn. PIN PIN NO. Device Bus Interface Bus CPU Pin Nr. Function CPU PIN Nr.
DIN Conn. PIN PIN NO. Device Bus Interface Bus CPU Pin Nr. Function A11 47 TIN0 B11 48 TOT0 C10 C11 CPU PIN Nr.
DIN Conn. PIN PIN NO. Device Bus CPU Pin Nr. Interface Bus Function CPU PIN Nr.
A32 B32 C32 GND A31 B31 C31 A30 B30 C30 A29 B29 C29 A28 B28 C28 A27 B27 C27 A26 B26 C26 A25 B25 C25 VCC TX0 RX0 TX1 RX1 A24 B24 C24 A23 B23 C23 P P G3 A22 B22 C22 P P G0 P P G1 P P G2 A21 B21 C21 A20 B20 C20 GND AGND A19 B19 C19 A18 B18 C18 A17 B17 C17 OUT3/IN7 OUT2/IN6 AVCC OUT0 OUT1 VCC A16 B16 C16 A15 B15 C15 IN5 OUT2/IN6 OUT3/IN7 A14 B14 C14 IN2 IN3 IN4 A13 B13 C13 A12 B12 C12 IN0 IN1 TIN0 TOT0 GND TIN1 TOT1 A11 B11 C11 A10 B10 C10 A9 B9 C9 A8 B8 C8 A7 B7 C7 SCK2 SIN2
