User's Manual

GS1500M DATA SHEET
PRELIMINARY GAINSPAN CONFIDENTIAL PAGE 34 OF 43
Figure 4-6: timing diagram, Slave mode, SPO=1, SPH=0.
Parameter Description Minimum Maximum Unit
tSSetup
Minimum time between falling
edge of Select line and first falling
edge of SPI clock.
4 core SPI
clock
periods +
68 ns
Mixed
tTxdDelay
Delay in Slave asserting TX line
after rising edge of SPI clock, or
the first bit after falling edge of the
Select line.
4 core SPI
clock
periods +
68 ns
Mixed
tRxdSetup
Time before falling edge of SPI
clock by which received data must
be ready.
15 ns
tRxdHold
Time for which received data
must be stable after falling edge
of SPI clock.
3 core SPI
clock
periods +
14 ns
Mixed
tSSHold
Time for which the Select line will
be held low after the sampling
edge for the final bit to be
transferred.
3 core SPI
clock
periods +
14 ns
MSPI
clock
period
Table 4-17: timing parameters, Slave mode, SPO=1, SPH=0.