User's Manual

Pin-out and Signal Description GS2011M Low Power WiFi Module Data Sheet
GS2011Mxx Device Pin-out
38 Confidential Preliminary GS2011M-DS-001211, Release 0.9
GS2011Mxx Module Pins Description
Table 7, page 38 describes the GS2011Mxx module pin signal description.
Table 7 GS2011Mxx Module Pin Signal Description
Pins Name Voltage
Domain
Internal Bias after
Hardware Reset
Drive
Strength
(mA)
Signal State Description
1 GND 0V Not Applicable Analog port Ground
2 JTAG_TCK VDDIO Pull-up (see Note 1) Digital Input JTAG Test Clock
3 JTAG_TDO VDDIO Not Applicable Digital Output JTAG Test Data Out
4 JTAG_TDI VDDIO Pull-up (see Note 1) Digital Input JTAG Test Data In
5 JTAG_TMS VDDIO Pull-up (see Note 1) Digital Input JTAG Test Mode Select
6 JTAG_TRST_n VDDIO Pull-up (see Note 1) Digital Input
JTAG Test Mode Reset
(Active Low)
7 RTC_IO_1 VRTC Pull-down (see Note 1)1
RTC Digital
Input/Output
Embedded Real Time Clock
Input/Output 1
8 RTC_IO_0 VRTC Pull-down (see Note 1)1
RTC Digital
Input/Output
Embedded Real Time Clock
Input/Output 0
9 VRTC VRTC Not Applicable Analog port
Embedded Real Time Clock
Power Supply
10
DC_DC_CNTRL/
RTC_IO_4
VRTC (see Note 1) 1
RTC Digital
Input/Output
VIN_3V3 Regulator
Control Output/RTC Digital
Input/Output
11 ADC1 VIN_3V3 Not Applicable Analog Input
General Analog to Digital
Converter 1
12 ADC2 VIN_3V3 Not Applicable Analog Input
General Analog to Digital
Converter 2
13 RTC_IO_2 VRTC Pull-down (see Note 1)1
RTC Digital
Input/Output
Embedded Real Time Clock
Input/Output 2
14 GPIO6/SPI1_DIN VDDIO Pull-down 4
Digital
Input/Output
GPIO/Serial Peripheral
Interface 1 Bus Data Input
15
GPIO7 /
SPI1_DOUT
VDDIO Pull-down 4
Digital
Input/Output
GPIO/Serial Peripheral
Interface 1 Bus Data Output
16 VOUT_1V8 VIN_3V3 Not Applicable Analog port
Internal 1.8V V
OUT
(internally regulated)
17 GND 0V Not Applicable Analog port Ground
18 GPIO5/SPI1_CLK VDDIO Pull-down 4
Digital
Input/Output
GPIO/Serial Peripheral
Interface 1 Bus Clock
19
GPIO4/
SPI1_CS_n_0
VDDIO Pull-down 4
Digital
Input/Output
GPIO/Serial Peripheral
Interface 1 Chip Select_0
(Active Low)