User's Manual

APEX™ Exciter Incorporating FLO™ Technologyr
APEX Exciter Digital Assembly Overview Theory of Operation
2604s400.fm
03/08/07 888-2604-001 Page: 4-3
WARNING: Disconnect primary power prior to servicing.
The adaptive precorrector board performs both linear (response and group delay) and
non-linear (phase and linearity) RTAC™ pre-correction on the signal as the symbol stream
passes through it. RTAC pre-correction is performed as follows.
The ADC (A11) receives the (11.1MHZ IF frequency) transmitter feedback samples
from down converter board (A5) of the analog assembly and converts it to the same
digital format as the signal from the modulator board. The modulator board output
and the feedback samples are then compared in the adaptive precorrector board and
adjustments are made to pre-correct the output signal of the adaptive precorrector
board. The pre-corrected signal cancels the non-linear and linear distortions generated
by the transmitter system PA and high power filter.
The adaptive precorrector board output is applied to the DAC board (A12), which converts
the 44.4 mega-sample/second digital stream to the 11.1 MHz (center frequency) first IF
output, which is sent to the up converter board (A3) of the analog assembly.
4.3.1 Controller Board Theory
The controller board controls all of the other boards except the power supply and the fan.
It indirectly controls the output amplifier through the APC (automatic power control) and
the mute function.
A built in communication engine handles all communications independent of CPU core.
Some of the controller board functions include the following.
1 Boot loads micro processor (itself) from flash.
A Copies application from flash to SDRAM (synchronous dynamic random ac-
cess memory). The application runs from SDRAM.
2 Does CRC (cyclic redundancy check)
3 Microprocessor boot loads other exciter sub systems, getting information from flash.
A Accesses CPLD version via CPLD JTAG. If CPLD version matches, it goes
on to rest of system. If it does not match, it programs the CPLD.
B It loads External I/O, Adaptive Precorrector, Modulator, Front Panel, and
UDC Interface Boards
4 Continually checks all external interfaces, which include:
• External I/O board, which includes the CAN bus, digital I/O (parallel exciter control
and status), analog I/O (such as VSWR fold back)
• 10 Base T (Ethernet port)
• RS232 ports, front and rear panels
• 1/4 color VGA (touch screen)
• UDC Interface board.
The adaptive precorrector and modulator boards are autonomous following boot loads,
with periodic health checks from the controller board.
The HPI (host port interface) and SPI (serial peripheral interconnect) are the means of
communication between the controller board and the adaptive precorrector and modulator
boards.