User's Manual
Table Of Contents
- Table of Contents
- List of Figures
- List of Tables
- 1 Introduction
- 2 Installation
- 3 Navigating the LCD Display Screens
- 3.1 Basic Operating Procedure
- 3.2 Starting Point: The Main LCD Touch Screen
- 3.3 LCD Display Flow Chart
- 3.4 Details of the Exciter Status Screens
- 3.4.1 System Status Screen
- 3.4.2 Transport Stream Status Screen
- 3.4.3 Adaptive Processing Board Status Screen
- 3.4.4 Digital Processing Screens
- 3.4.4.1 Modulator Board Status, Screen 1/2
- 3.4.4.2 ADC and DAC Boards Status, Screen 2/2
- 3.4.4.3 FLO FPGA Status, Summary, Screen 1/5
- 3.4.4.4 FLO FPGA, GPS & Clock Status, Screen 2/5
- 3.4.4.5 FLO FPGA, Transport Stream Status, Screen 3/5
- 3.4.4.6 FLO FPGA, SFN FIFO Status, Screen 4/5
- 3.4.4.7 FLO FPGA, MTI Status, Screen 5/5
- 3.4.5 IF & RF Processing Status Screens
- 3.4.6 System Control Status Screens
- 3.5 Built In Tests
- 3.6 Details of the System Setup Screens
- 3.7 RTAC Operating Procedures, Main Screen.
- 4 Theory of Operation
- 5 Maintenance and Troubleshooting
- 5.1 Exciter Maintenance
- 5.2 Loading Software
- 5.3 Default Settings For DIagnostics Screens
- 5.4 Typical Settings for the More Critical Exciter Setups
- 5.5 Exciter Troubleshooting Flow Charts
- 5.6 General Troubleshooting
- 5.7 System Troubleshooting
- 5.8 Exciter Troubleshooting
- 6 Parts List
- Appendix A Exciter GUI Screen Captures
APEX™ Exciter Incorporating FLO™ Technology
Details of the Exciter Status Screens Navigating the LCD Display Screens
2604s300.fm
03/08/07 888-2604-001 Page: 3-21
WARNING: Disconnect primary power prior to servicing.
3.4.5.2.1 PLL Diagnostics
Refer to Figure 3-19. This screen is not used phase lock loop boards where the PLL Board
10 kHz Reference entry, shown in Figure 3-18, is labeled N/A. It is used for units where
the PLL Board 10 kHz Reference entry is labeled Yes.
The Xtal Aging (crystal oscillator aging) control is used to set the frequency of the internal
10 MHz crystal oscillator when no external reference is used. The initial setting should
typically be in the range of 3000 to 3500.
PLLDiagnostics.bmp
Figure 3-19 PLL Diagnostics
3.4.5.3 Up Converter Board Status Screen
UpConverterStatus.bmp
Figure 3-20 Up Converter Board Status Screen
The exciter output amplifier does not have a separate screen. It parameters (+/-15 Vdc and
RF detector output) are included in this screen. The UDC Interface Board screen is shown
in Figure 3-20, with screen entries listed below.