User's Manual

1.0/November 1998 1891 1210

control loop while C39 and C38 provide low-pass filtering at frequencies outside the

bandwidth of the control loop. This is necessary in order to filter out residual narrow

pulses which appear at the output of the phase comparator in IC6. C37 is provided for

decoupling purposes at RF frequencies.

IC6 also provides a ‘lock detect’ output at pin 7. This output is rectified and filtered by D1

and C23, then fed via R29 and R26 to pin 18 of microprocessor IC3. Pin 18 can function

as either an input or an output port; when IC3 is providing serial data to frequency

synthesiser IC6 then pin 18 acts as the data output port (‘DT’). Pins 17 and 12 provide

‘enable’ (‘EN’) and ‘clock’ (‘CK’) outputs which are also required by IC6 in conjunction with

the ‘DT’ output. The supply voltages to IC3 and IC6 are not identical, due to the separate

supply decoupling provided; resistors R26, R27 and R25 are therefore provided to ensure

that excessive current cannot flow under any conditions.

IC7 provides further amplification of the filtered output from IC5. However, its main

function is to provide further isolation between oscillator TR5 and the final output of the

transmitter; this is in order to minimise the effect of transmitter load changes on the

oscillator frequency. IC7 receives its DC power via microprocessor IC3; this allows IC7 to

act as a switch, in effect, so that there is negligible RF output from the transmitter in the

event that an out-of-lock condition is detected.

The output from IC7 is fed via C46 to the base of TR3 which functions as a common-

emitter amplifier, the emitter of TR3 being decoupled by C18 and C22. The output from

TR3 is developed across its collector choke L6 and is coupled via C27 to the base of

common-emitter amplifier TR4. The emitter of TR4 is decoupled by C24.

The output from TR4 is developed across its collector choke L7 and is fed via C19 and L4

to a low-pass filter comprised of C17, L3, C15, L2, C13, L1 and C10. The output from this

filter is fed to pin 2 of the RF output connector PL2.

The DC arrangements for TR3 and TR4 are as follows :

Operational amplifier IC4b provides a DC output of nominally +5.75V which is fed via

choke L11 to the base of TR3. The emitter of TR3 is thus held at approximately +5V

provided that the supply to IC4 (‘+Vraw’) is greater than +7V. TR4 takes its collector

supply voltage from the emitter of TR3 (via L7); it thus has a supply voltage which is

stabilised against variations in the input supply voltage to the transmitter module.