User's Manual

Table Of Contents
Cinterion
®
ELS61-AUS Hardware Interface Description
2.1 Application Interface
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ELS61-AUS_HID_v00.031 2016-06-03
Confidential / Preliminary
Page 27 of 102
2.1.5 Serial Interface ASC1
Four ELS61-AUS GPIO lines can be configured as ASC1 interface signals to provide a 4-wire
unbalanced, asynchronous modem interface ASC1 conforming to ITU-T V.24 protocol DCE
signalling. The electrical characteristics do not comply with ITU-T V.28. The significant levels
are 0V (for low data bit or active state) and 1.8V (for high data bit or inactive state). For electrical
characteristics please refer to Table 2. For an illustration of the interface line’s startup behavior
see Figure 9.
The ASC1 interface lines are originally available as GPIO lines. If configured as ASC1 lines,
the GPIO lines are assigned as follows: GPIO16 --> RXD1, GPIO17 --> TXD1, GPIO18 -->
RTS1 and GPIO19 --> CTS1. Configuration is done by AT command (see [1]: AT^SCFG). The
configuration is non-volatile and becomes active after a module restart.
ELS61-AUS is designed for use as a DCE. Based on the conventions for DCE-DTE connec-
tions it communicates with the customer application (DTE) using the following signals:
Port TXD @ application sends data to module’s TXD1 signal line
Port RXD @ application receives data from the module’s RXD1 signal line
Figure 8: Serial interface ASC1
Features
Includes only the data lines TXD1 and RXD1 plus RTS1 and CTS1 for hardware hand-
shake.
On ASC1 no RING line is available.
Configured for 8 data bits, no parity and 1 or 2 stop bits.
ASC1 can be operated at fixed bit rates from 1,200 bps to 921,600 bps.
Autobauding supports bit rates from 1,200bps up to 230,400bps.
Supports RTS1/CTS1 hardware flow. The hardware hand shake line RTS0 has an internal
pull down resistor causing a low level signal, if the line is not used and open. Although hard-
ware flow control is recommended, this allows communication by using only RXD and TXD
lines.