User's Manual
Table Of Contents
- Contents
- Tables
- Figures
- 1 Introduction
- 2 Interface Characteristics
- 2.1 Application Interface
- 2.2 RF Antenna Interface
- 2.3 Sample Application
- 3 Operating Characteristics
- 3.1 Operating Modes
- 3.2 Power Up/Power Down Scenarios
- 3.3 Power Saving
- 3.4 Power Supply
- 3.5 Operating Temperatures
- 3.6 Electrostatic Discharge
- 3.7 Blocking against RF on Interface Lines
- 3.8 Reliability Characteristics
- 4 Mechanical Dimensions, Mounting and Packaging
- 5 Regulatory and Type Approval Information
- 6 Document Information
- 7 Appendix
Cinterion
®
ELS61-AUS Hardware Interface Description
2.1 Application Interface
52
ELS61-AUS_HID_v00.031 2016-06-03
Confidential / Preliminary
Page 38 of 102
2.1.11 PWM Interfaces
The GPIO6 and GPIO7 interface lines can be configured as Pulse Width Modulation interface
lines PWM1 and PWM2. The PWM interface lines can be used, for example, to connect buzz-
ers. The PWM1 line is shared with GPIO7 and the PWM2 line is shared with GPIO6 (for GPIOs
see Section 2.1.8). GPIO and PWM functionality are mutually exclusive.
The startup behavior of the lines is shown in Figure 13.
2.1.12 Pulse Counter
The GPIO8 line can be configured as pulse counter line COUNTER. The pulse counter inter-
face can be used, for example, as a clock (for GPIOs see Section 2.1.8).
2.1.13 Control Signals
2.1.13.1 Status LED
The GPIO5 interface line can be configured to drive a status LED that indicates different oper-
ating modes of the module (for GPIOs see Section 2.1.8). GPIO and LED functionality are mu-
tually exclusive.
To take advantage of this function connect an LED to the GPIO5/LED line as shown in Figure
17.
Figure 17: Status signaling with LED driver
VCC
GPIO5/
LED
LED
GNDGND
R1
R2
R3