User's Manual

Table Of Contents
Cinterion
®
ELS61-AUS Hardware Interface Description
2.3 Sample Application
52
ELS61-AUS_HID_v00.031 2016-06-03
Confidential / Preliminary
Page 51 of 102
Figure 27: Schematic diagram of ELS61-AUS sample application
VCORE
V180
ASC0 (including GPIO1...GPIO3 for
DSR0, DTR0, DCD0 and GPIO24 for
RING0)/SPI_CLK (for DSR0)
GPIO16...GPIO19/
ASC1/
SPI
8
4
CCVCC
CCIO
CCCLK
CCIN
CCRST
SIM
V180
220nF
1nF
I2CCLK
I2CDAT
2.2k
V180
GPIO4 (FST_SHDN)
GPIO5 (Status LED)
GPIO6 (PWM)
GPIO7 (PWM)
GPIO8 (COUNTER)
GPIO11...GPIO15
LED
GND
GND
GND
ANT_MAIN
BATT+
RF
Power supply
Main antenna
ELS6x
All SIM components should be
close to card holder. Keep SIM
wires low capacitive.
*10pF
*10pF
* add optional 10pF for SIM protection
against RF (internal Antenna)
50µF,
Low ESR!
33pF
Blocking**
Blocking**
Blocking**
PWR_IND
BATT+
BB
53
204
GPIO20...GPIO23
4
Blocking**
100k
4.7k
100k
22k
2.2k
3
USB
150µF,
Low ESR!
33pF
GND
GND
ANT_DRX
Diversity antenna
ON
EMERG_RST
RESET
VDDLP
100k
VDDLP
Blocking** = For more details see Section 3.7
For switch on circuit see Section 3.2.1.2