User's Manual

Cinterion
®
ELS61-US Hardware Interface Overview
2.4 Sample Application
21
 ELS61-US_HIO_v00.281 2016-02-11
Confidential / Preliminary
Page 21 of 40
Figure 6: Schematic diagram of ELS61-US sample application
VCORE
V180
ASC0 (including GPIO1...GPIO3 for
DSR0, DTR0, DCD0 and GPIO24 for
RING0)/SPI_CLK (for DSR0)
GPIO16...GPIO19/
ASC1/
SPI
8
4
CCVCC
CCIO
CCCLK
CCIN
CCRST
SIM
V180
220nF
1nF
I2CCLK
I2CDAT
2.2k
V180
GPIO4 (FST_SHDN)
GPIO5 (Status LED)
GPIO6 (PWM)
GPIO7 (PWM)
GPIO8 (COUNTER)
GPIO11...GPIO15
LED
GND
GND
GND
ANT_MAIN
BATT+
RF
Power supply
Main antenna
ELS6x
All SIM components should be
close to card holder. Keep SIM
wires low capacitive.
*10pF
*10pF
* add optional 10pF for SIM protection
against RF (internal Antenna)
50µF,
Low ESR!
33pF
Blocking**
Blocking**
Blocking**
PWR_IND
BATT+
BB
53
204
GPIO20...GPIO23
4
Blocking**
100k
4.7k
100k
22k
2.2k
3
USB
150µF,
Low ESR!
33pF
GND
GND
ANT_DRX
Diversity antenna
ON
EMERG_RST
RESET
VDDLP
100k
VDDLP
Switch on