User's Manual

AP6234 Datasheet
AMPAK Technology Inc. www.ampak.com.tw
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14
9. External clock reference
External LPO signal characteristics
Parameter Specification Units
Nominal input frequency 32.768 kHz
Frequency accuracy
30

ppm
Duty cycle 30 - 70 %
Input signal amplitude 400 to 1800 mV, p-p
Signal type Square-wave -
Input impedance
>100k
<5

pF
Clock jitter (integrated over 300Hz – 15KHz) <1 Hz
Output high voltage 0.7Vio - Vio V
9.1 SDIO Pin Description
The module supports SDIO version 2.0 for 4-bit modes (100 Mbps), and high speed 4-bit (50
MHz clocks – 200 Mbps). It has the ability to stop the SDIO clock and map the interrupt
signal into a GPIO pin. This ‘out-of-band’ interrupt signal notifies the host when the WLAN
device wants to turn on the SDIO interface. The ability to force the control of the gated
clocks from within the WLAN chip is also provided.
 Function 0 Standard SDIO function (Max BlockSize / ByteCount = 32B)
 Function 1 Backplane Function to access the internal System On Chip (SOC)
address space (Max BlockSize / ByteCount = 64B)
 Function 2 WLAN Function for efficient WLAN packet transfer through DMA (Max
BlockSize/ByteCount=512B)
SDIO Pin Description
SD 4-Bit Mode
DATA0 Data Line 0
DATA1 Data Line 1 or Interrupt
DATA2 Data Line 2 or Read Wait
DATA3 Data Line 3
CLK Clock
CMD Command Line