User's Manual
Table Of Contents
- 1. General description
- 2. Features and benefits
- 3. Quick reference data
- 4. Ordering information
- 5. Block diagram
- 6. Pinning information
- 7. Limiting values
- 8. Recommended operating conditions
- 9. Thermal characteristics
- 10. Characteristics
- 10.1 Power management characteristics
- 10.2 Antenna presence self test thresholds
- 10.3 Typical 27.12 MHz Crystal requirements
- 10.4 Pin characteristics for 27.12 MHz XTAL Oscillator (OSCIN, OSCOUT)
- 10.5 RSTPD_N input pin characteristics
- 10.6 Input pin characteristics for I0, I1 and TESTEN
- 10.7 RSTOUT_N output pin characteristics
- 10.8 Input/output characteristics for pin P70_IRQ
- 10.9 Input/output pin characteristics for P30 / UART_RX, P31 / UART_TX, P32_INT0, P33_INT1
- 10.10 Input/output pin characteristics for P35
- 10.11 Input/output pin characteristics for DP and DM
- 10.12 Input pin characteristics for SCL
- 10.13 Input/output pin characteristics for SDA
- 10.14 Output pin characteristics for DELATT
- 10.15 Input pin characteristics for SIGIN
- 10.16 Output pin characteristics for SIGOUT
- 10.17 Input/output pin characteristics for P34
- 10.18 Output pin characteristics for LOADMOD
- 10.19 Input pin characteristics for RX
- 10.20 Output pin characteristics for AUX1/AUX2
- 10.21 Output pin characteristics for TX1/TX2
- 10.22 System reset timing
- 10.23 Timing for the I2C-bus interface
- 10.24 Temperature sensor
- 11. Application information
- 12. Abbreviations
- 13. Revision history
- 14. Legal information
- 15. Contact information
- 16. Tables
- 17. Figures
- 18. Contents
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PR533_SDS All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product short data sheet
COMPANY PUBLIC
Rev. 3.6 — 27 October 2014
206436 14 of 36
NXP Semiconductors
PR533
USB NFC integrated reader solution
10.8 Input/output characteristics for pin P70_IRQ
[1] To minimize power consumption when in soft power-down mode, the limit is V
DD(PVDD)
0.4 V.
[2] To minimize power consumption when in soft power-down mode, the limit is 0.4 V.
[3] Data at V
DD(PVDD)
= 1.8 V are only given from characterization results.
[4] The I
OH
and I
OL
give the output driving capability and allow to calculate directly the rise and fall time as function of the load capacitance.
Table 15. Input/output pin characteristics for pin P70_IRQ
Symbol Parameter Conditions Min Typ Max Unit
V
IH
HIGH-level input volt-
age
[1]
0.7 V
DD(PVDD)
-V
DD(PVDD)
V
V
IL
LOW-level input voltage
[2]
0-0.3 V
DD(PVDD)
V
V
OH
HIGH-level output volt-
age
push-pull mode;
V
DD(PVDD)
=3V; I
OH
= 4mA
0.7 V
DD(PVDD)
-V
DD(PVDD)
V
push-pull mode;
V
DD(PVDD)
= 1.8 V; I
OH
=-2mA
[3]
0.7 V
DD(PVDD)
-V
DD(PVDD)
V
V
OL
LOW-level output volt-
age
push-pull mode;
V
DD(PVDD)
=3V; I
OL
=4mA
0-0.3 V
DD(PVDD)
V
push-pull mode;
V
DD(PVDD)
= 1.8 V; I
OL
=2mA
[3]
0-0.3 V
DD(PVDD)
V
I
IH
HIGH-level input current input mode; V
I
=V
DDD
1-1 A
I
IL
LOW-level input current input mode; V
I
=0V 1-1 A
I
OH
HIGH-level output cur-
rent
V
DD(PVDD)
=3V;
V
OH
=0.8 V
DD(PVDD)
[5]
4-- mA
I
OL
LOW-level output cur-
rent
V
DD(PVDD)
=3V;
V
OL
=0.2 V
DD(PVDD)
[5]
4--mA
I
LI
input leakage current RSTPD_N = 0.4 V 1-1 A
C
i
input capacitance - 2.5 pF
C
L
load capacitance - - 30 pF
t
r
rise time V
DD(PVDD)
=3V;
V
OH
=0.8 V
DD(PVDD)
;
C
L
=30pF
--13.5ns
V
DD(PVDD)
=1.8V;
V
OH
=0.7 V
DD(PVDD)
;
C
L
=30pF
--10.8ns
t
f
fall time V
DD(PVDD)
=3V;
V
OL
=0.2 V
DD(PVDD)
;
C
L
=30pF
--13.5ns
V
DD(PVDD)
=1.8V;
V
OL
=0.3 V
DD(PVDD)
;
C
L
=30pF
--10.8ns