User's Manual

PR533_SDS All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product short data sheet
COMPANY PUBLIC
Rev. 3.6 — 27 October 2014
206436 20 of 36
NXP Semiconductors
PR533
USB NFC integrated reader solution
10.12 Input pin characteristics for SCL
[1] To minimize power consumption when in soft power-down mode, the limit is V
DDD
 0.4 V.
[2] To minimize power consumption when in soft power-down mode, the limit is 0.4 V.
[3] The PR533 has a slope control according to the I
2
C-bus specification for the Fast mode. The slope control is always present and not
dependent of the I
2
C-bus speed.
10.13 Input/output pin characteristics for SDA
[1] To minimize power consumption when in soft power-down mode, the limit is V
DDD
 0.4 V.
[2] To minimize power consumption when in soft power-down mode, the limit is 0.4 V.
[3] The PR533 has a slope control according to the I
2
C-bus specification for the Fast mode. The slope control is always present and not
dependent of the I
2
C-bus speed.
Table 23. Input/output drain output pin characteristics for SCL I
2
C interface
Symbol Parameter Conditions Min Typ Max Unit
V
IH
HIGH-level input voltage
[1]
0.7  V
DD(PVDD)
-V
DDD
V
V
IL
LOW-level input voltage
[2]
0-0.3 V
DDD
V
V
OL
LOW-level output voltage V
DDD
=3V;
I
OL
= 4mA
0-0.3V
I
IH
HIGH-level input current V
I
=V
DDD
1-1A
I
IL
LOW-level input current V
I
=0V 1-1A
I
LI
input leakage current RSTPD_N = 0.4 V 1-1A
C
i
input capacitance - 2.5 pF
C
L
load capacitance - - 30 pF
t
r
rise time of both SDA and SCL signals
[3]
20 - 300 ns
t
f
fall time of both SDA and SCL signals
[3]
20 - 300 ns
Table 24. Input/output drain output pin characteristics for SDA I
2
C interface
Symbol Parameter Conditions Min Typ Max Unit
V
IH
HIGH-level input voltage
[1]
0.7  V
DD(PVDD)
-V
DDD
V
V
IL
LOW-level input voltage
[2]
0-0.3 V
DDD
V
V
OL
LOW-level output voltage V
DDD
=3V;
I
OL
= 4mA
0-0.3V
I
IH
HIGH-level input current V
I
=V
DDD
1-1A
I
IL
LOW-level input current V
I
=0V 1-1A
I
LI
input leakage current RSTPD_N = 0.4 V 1-1A
C
i
input capacitance - 2.5 pF
C
L
load capacitance - - 30 pF
t
r
rise time of both SDA and SCL signals
[3]
20 - 300 ns
t
f
fall time of both SDA and SCL signals
[3]
20 - 300 ns