User`s manual

- 115 - Appendix
5-4 POST Error Code
POST (hex) Description
CFh Test CMOS R/W functionality
C0h Early chipset initialization:
-Disable shadow RAM
- Program basic chipset registers
C1h Detect memory
- Auto-detection of DRAM size, type and ECC
C3h Expand compressed BIOS code to DRAM
C5h Call chipset hook to copy BIOS back to E000 & F000 shadow RAM
01h Expand the Xgroup codes locating in physical address 1000:0
02h DualBIOS init (optional)
03h Initial Superio_Early_Init switch
05h 1. Blank out screen
2. Clear CMOS error ag
07h 1. Clear 8042 interface
2. Initialize 8042 self-test
08h 1. Test special keyboard controller for Winbond 977 series Super I/O chips
2. Enable keyboard interface
0Ah 1. Disable PS/2 mouse interface (optional)
2. Auto detect ports for keyboard & mouse followed by a port & interface swap (op-
tional)
3. Reset keyboard Super I/O chips
0Eh Test F000h segment shadow to see whether it is R/W-able or not. If test fails, keep
beeping the speaker
10h Auto detect ash type to load appropriate ash R/W codes into the run time area in
F000 for ESCD & DMI support
12h Use walking 1's algorithm to check out interface in CMOS circuitry. Also set real-time
clock power status, and then check for override
14h Program chipset default values into chipset. Chipset default values are MODBINable
by OEM customers
16h Initial onboard clock generator if Early_Init_Onboard_Generator is dened. See also
POST 26h
18h Detect CPU information including brand, SMI type and CPU level
1Bh Initial interrupts vector table. If no special specied, all H/W interrupts are directed to
SPURIOUS_INT_HDLR & S/W interrupts to SPURIOUS_soft_HDLR
1Dh Initial EARLY_PM_INIT switch
23h 1. Check validity of RTC value:
e.g. a value of 5Ah is an invalid value for RTC minute
2. Load CMOS settings into BIOS stack. If CMOS checksum fails, use default value
instead