User's Manual
Table Of Contents
- Box Contents
- Optional Items
- Z590 AORUS TACHYON Motherboard Layout
- Z590 AORUS TACHYON Motherboard Block Diagram
- Chapter 1 Hardware Installation
- Chapter 2 BIOS Setup
- Chapter 3 Configuring a RAID Set
- Chapter 4 Drivers Installation
- Chapter 5 Unique Features
- Chapter 6 Appendix
Hardware Installation
- 25 -
Voltage Measurement Points
Use a multimeter to measure the following motherboard voltages.
VCCVTT
Pin 1
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
S _
SF
B_
B_
F
_0
S
S
_0F
_F
_
_
__B
U
S _S
_
SF_
B
USB0_B
B_
B_
F_USB3
F_USB303
_
_3U
S_
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
S _
SF
B_
B_
F
_0
S
S
_0F
_F
_
_
__B
U
S _S
_
SF_
B
USB0_B
B_
B_
F_USB3
F_USB303
_
_3U
S_
Pin 1
VIO2
VAXGVCCST
VSA
VCCPLL
VPLL_OC
PCH_CORE
VDDR
Pin 1
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
S _
SF
B_
B_
F
_0
S
S
_0F
_F
_
_
__B
U
S _S
_
SF_
B
USB0_B
B_
B_
F_USB3
F_USB303
_
_3U
S_
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
S _
SF
B_
B_
F
_0
S
S
_0F
_F
_
_
__B
U
S _S
_
SF_
B
USB0_B
B_
B_
F_USB3
F_USB303
_
_3U
S_
Pin 1
Pin 1
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
S _
SF
B_
B_
F
_0
S
S
_0F
_F
_
_
__B
U
S _S
_
SF_
B
USB0_B
B_
B_
F_USB3
F_USB303
_
_3U
S_
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
S _
SF
B_
B_
F
_0
S
S
_0F
_F
_
_
__B
U
S _S
_
SF_
B
USB0_B
B_
B_
F_USB3
F_USB303
_
_3U
S_
Pin 1
Pin 1
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
S _
SF
B_
B_
F
_0
S
S
_0F
_F
_
_
__B
U
S _S
_
SF_
B
USB0_B
B_
B_
F_USB3
F_USB303
_
_3U
S_
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
S _
SF
B_
B_
F
_0
S
S
_0F
_F
_
_
__B
U
S _S
_
SF_
B
USB0_B
B_
B_
F_USB3
F_USB303
_
_3U
S_
Pin 1
Pin 1
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
S _
SF
B_
B_
F
_0
S
S
_0F
_F
_
_
__B
U
S _S
_
SF_
B
USB0_B
B_
B_
F_USB3
F_USB303
_
_3U
S_
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
S _
SF
B_
B_
F
_0
S
S
_0F
_F
_
_
__B
U
S _S
_
SF_
B
USB0_B
B_
B_
F_USB3
F_USB303
_
_3U
S_
Pin 1
VIO1
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
S _
SF
B_
B_
F
_0
S
S
_0F
_F
_
_
__B
U
S _S
_
SF_
B
USB0_B
B_
B_
F_USB3
F_USB303
_
_3U
S_
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
S _
SF
B_
B_
F
_0
S
S
_0F
_F
_
_
__B
U
S _S
_
SF_
B
USB0_B
B_
B_
F_USB3
F_USB303
_
_3U
S_
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
S _
SF
B_
B_
F
_0
S
S
_0F
_F
_
_
__B
U
S _S
_
SF_
B
USB0_B
B_
B_
F_USB3
F_USB303
_
_3U
S_
Pin 1
VCORE_IO
Pin 1
VCORE_SKT
Pin 1
VCORE_DIE
Enhanced LN2 Mode Switch (LN2_OFFSET)
Dependent on the LN2_SW switch setting (unavailable if LN2_SW is set to 1). Enabling this switch will allow the CPU to
boot up at a temperature as low as possible.
Reserved Switch (RSV_SW)
This switch is reserved for hardware expansion. A single phase power design is reserved for future use.
1
2
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
SF
1
2
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
SF
2: Enables Enhanced LN2 Mode
1: Disables Enhanced LN2 Mode
OCTriggerSwitch(TGR)
This switch can be used to lower the CPU frequency to cool down the CPU temperature before running a benchmark without
having to change any software settings. Instantly setting the TGR switch back to its default position when the benchmark begins
will revert the CPU frequency to the original value.
LN2 Mode Switch (LN2_SW)
Use
this switch to enable or disable optimized LN2 mode. Enabling this switch will allow the CPU to effectively boot up
at a lower temperature.
2: Safe frequency (using the lowest CPU ratio, which may vary by CPU)
1:
Target frequency set in BIOS Setup or other overclocking application.
1
2
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
SF
1
2
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
SF
1
2
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
SF
1
2
F_USB30
F_U
B_
F_ F_
_
B
BS_
B
SB_
B
_S
S_
_
B
_U
_
B
S
123
123
123
123
1
1
1
1
BSS
S
_S
SSU
1 2 3
S3
BSSS
U
__ 3
F_USB3F
S _
S _
SF
2: Enables LN2 Mode
1: Disables LN2 Mode