Specifications

• Supports antenna diversity
• Power down leakage current of < 10uA
• Integrated low power 32-bit CPU could be used as application processor
• SDIO 2.0, SPI, UART
• STBC, 1×1 MIMO, 2×1 MIMO
• A-MPDU & A-MSDU aggregation & 0.4µs guard interval
• Wake up and transmit packets in < 2ms
• Standby power consumption of < 1.0mW (DTIM3)
3. Block Diagram
4.General Specification