User manual

LABKON Series
_________________________________________________________________________________________________
46 GMC-I Messtechnik GmbH
4.39 Status Reporting Commands
SYSTem:ERRor?
This query command reads one error from the error queue. When the front-panel ERROR annunciator turns on, one or more
command syntax or hardware errors have been detected. A record of up to 20 errors can be stored in the power supply’s
error queue. Additional errors will not be stored.
1. Errors are stored and retrieved in first-in-first-out (FIFO) order. The first error returned is the first error that was stored.
When you have read all errors from the queue, the “ERROR” annunciator turns off.
2. If more than 20 errors have occurred, the last error stored in the queue (the most recent error) is replaced with -350, “Too
many errors”. No additional errors are stored until you read or remove errors from the queue. If no errors have occurred
when you execute this command, the power supply responds with “+0”, “No error”.
3. The error queue is cleared when the power has been off or a *CLS (clear status) command has been executed. The
*RST (reset) command does not clear the error queue.
STATus:QUEStionable[:EVENt]?
This command queries the questionable status event register. The power supply returns a decimal value which corresponds
to the binary-weighted sum of all bits in the register.
STATus:QUEStionable:ENABle <enable value>
This command enables or disables bits in the questionable status event register. The selected bits are then reported to the
status byte.
STATus:QUEStionable:ENABle?
This command queries the questionable status enable register. The power supply returns a decimal value representing the
bits set in the enable register and corresponding to the binary-weighted sum of all bits in the register.
*CLS
This command clears all event registers and status byte register.
*ESE <enable value>
This command enables bits in the standard event enable register. The selected bits are then reported to the status byte.
*ESE?
This command queries the standard event enable register. The power supply returns a decimal value which corresponds to
the binary-weighted sum of all bits in the register.
*ESR?
This command queries the standard event register. The power supply returns a decimal value which corresponds to the
binary-weighted sum of all bits in the register.
*OPC
This command sets the “Operation Complete” bit (bit 0) of the standard event register after the command is executed.
*PSC { 0 | 1 }
(Power-on status clear.) This command clears the status byte and the standard event register enable masks when power is
turned on (*PSC 1). When *PSC 0 is in effect, the status byte and standard event register enable masks are not cleared when
power is turned on.
*PSC?
This command queries the power-on status clear setting. The returned parameter is “0” (*PSC 0) or “1” (*PSC 1).
*SRE <enable value>
This command enables bits in the status byte enable register.