Data Sheet
Table Of Contents
- Contents
- Tables
- Figures
- 1 Product Overview
- 2 Functional Description
- 3 FM17520 Register Set
- 4 Host Interfaces
- 5 Analog Interface And Contactless UART
- 6 CRC Coprocessor
- 7 FIFO Buffer
- 8 Interrupt Request System
- 9 Timer
- 10 Power Reduction Modes
- 11 Low Voltage Detection
- 12 Oscillator Circuitry
- 13 Reset And Oscillator Start-Up Time
- 14 Command Set
- 15 Testsignals
- 16 Typical Application Diagram
- 17 Characteristics
- 18 Ordering Information
- 19 Package Information
- Revision History
- Sales and Service
3 FM17520 Register Set
Datasheet
FM17520 Contactless Transceiver IC Ver 1.0 36
3.2.3.10 ModGsPReg_address 29h
Define the driver P-output conductance during modulation.
Bit
7
6
5
4
3
2
1
0
Definition
RFU
RFU
ModGsP
Access Rights
-
-
r/w
r/w
r/w
r/w
r/w
r/w
Reset Value
0
0
1
0
0
0
0
0
Tab3-86 ModGsPReg register
Bit
Symbol
Description
7-6
-
Reserved for future use.
5-0
ModGsP
The value of this register defines the conductance of the output
P-driver for the time of modulation. This may be used to regulate the
modulation index.
Remark: The conductance value is binary weighted.
Remark: During soft Power-down mode the highest bit is forced to 1.
Tab3-87 ModGsPReg bits description
3.2.3.11 TModeReg，TPrescalerReg_address 2Ah
Define settings for the timer.
Remark: The Prescaler value is split into two 8-bit registers.
Bit
7
6
5
4
3
2
1
0
Definition
TAuto
TGated
TAutoRestart
TPrescaler_Hi
Access
Rights
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
Reset Value
0
0
0
0
0
0
0
0
Tab3-88 TModeReg register
Bit
Symbol
Description
7
TAuto
Set to logic 1, the timer starts automatically at the end of the
transmission in all communication modes at all speeds.
The timer stops after the 5
th
bit (1 startbit, 4 databits) if the bit
RxMultiple in the register RxModeReg is not set.
If RxMultiple is set to logic 1, the timer never stops. In this case the
timer can be stopped by setting the bit TStopNow in register
ControlReg to 1.
Setting to logic 0 indicates, that the timer is not influenced by the
protocol.
6-5
TGated
The internal timer is running in gated mode.
Remark: In the gated mode, the bit TRunning is 1 when the timer is
enabled by the register bits.
Value
Description
00
Non gated mode
01
Gated by TIN
10
Gated by AUX1
11
-
4
TAutoRestart
Set to logic 1, the timer automatically restarts its count-down from
TReloadValue, instead of counting down to 0.
Set to logic 0 the timer decrements to 0 and the bit TimerIRq is set
to logic 1.
3-0
TPrescaler_Hi
Defines higher 4 bits for TPrescaler.
f
Timer
= 13.56 MHz/(2*TPreScaler+1)
Where TPreScaler = [TPrescaler_Hi：TPrescaler_Lo] (total 12 bits)