User Manual Part 1

CIRCUIT ANALYSIS
32 MM101271V1 R2A
EPLD BACKPLANE
5.0V
5.0V
Figure 6 - Input Circuits U22A, E, F, U29D and U32B
The FSL output from the EPLD to the backplane is connected through inverter circuit
U33A and FET Q2 (BKP-FSL).
The RX-MUTE output from the EPLD to the backplane is connected through Inverter
U33D and transistor circuit Q1 (BKP-RX_MUTE).
The EMSQTOAV output from the EPLD to the backplane is accomplished through
Inverter U35C and transistor circuit Q6 (BKP-EMSQTOAV).
Other outputs from the EPLD to the backplane are connected through identical circuits as
shown in Figures 7 & 8. Figure 7 shows circuits using Schmitt Triggers U29B, C, E, F
and U32A & C to provide sharp, well-defined outputs to the backplane and to provide 5V
levels (Inputs are generally 3.3V). These outputs are:
• BKP-WALSH1 (U29B) • BKP-RFTXDAT (U29F)
• BKP-WALSH2 (U29C) • BKP-RFTXCLK (U32A)
• BKP-A/DMODCTL (U29E) • BKP-LSDOUT (U32C)
EPLD BACKPLANE
5.0V
0-5V0-3.3V
Figure 7 - Output Circuits U29B, C, E & F, U33C, E & F and U34A thru F
Figure 8 shows circuits using open collector inverters circuits U33B, C, E, F, U34A, B,
C, D, E, F and U35C, D, E & F. These outputs are: