Hitachi Global Storage Technologies Hard Disk Drive Specification Hitachi Travelstar 80GN 2.5 inch ATA/IDE hard disk drive Models: IC25N020ATMR04 IC25N030ATMR04 IC25N040ATMR04 IC25N060ATMR04 IC25N080ATMR04 Revision 2.
Hard Disk Drive Specification Travelstar 80GN 2.5 inch ATA/IDE hard disk drive Models: IC25N020ATMR04 IC25N030ATMR04 IC25N040ATMR04 IC25N060ATMR04 IC25N080ATMR04 Revision 2.
Hitachi Global Storage Technologies 1st Edition (Revision 0.1) Sxxx-xxxx-01 (1 December 2002) Preliminary 2nd Edition (Revision 0.2) Sxxx-xxxx-01 (27 Feburary 2003) Preliminary 3rd Edition (Revision 0.3) S13K-1055-03(7 March 2003) Preliminary 4th Edition (Revision 0.4) S13K-1055-04(7 March 2003) Preliminary 5th Edition (Revision 0.5) S13K-1055-05(7 March 2003) Preliminary 6th Edition (Revision 1.0) S13K-1055-10(7 March 2003) Revision 7th Edition (Revision 1.
Hitachi Global Storage Technologies Table of Contents 1.0 General........................................................................................................................................5 1.1 Introduction............................................................................................................................5 1.2 References..............................................................................................................................5 1.3 Abbreviations.......
.3.4 Service life and usage condition ...................................................................................29 6.3.5 Preventive maintenance ................................................................................................29 6.3.6 Load/unload ..................................................................................................................29 6.4 Mechanical specifications...............................................................................................
Hitachi Global Storage Technologies 7.9.7 Device Terminating Write DMA ..................................................................................53 7.9.8 Host Terminating Write DMA......................................................................................54 7.10 Drive address setting............................................................................................................55 7.11 Addressing of HDD registers..................................................................
11.8.1 Attributes ....................................................................................................................77 11.8.2 Attribute values...........................................................................................................77 11.8.3 Attribute thresholds.....................................................................................................77 11.8.4 Threshold exceeded condition ...........................................................................
Hitachi Global Storage Technologies 13.13 Read DMA (C8h/C9h).......................................................................................................124 13.14 Read DMA EXT (25h) ......................................................................................................126 13.15 Read Long (22h/23h) .........................................................................................................128 13.16 Read Multiple (C4h) .....................................................
15.2 SET FEATURES Commands Support Coverage ................................................................197 15.3 Changes from Travelstar 60GH and 40GN .........................................................................
Hitachi Global Storage Technologies List of Tables Table 1: Formatted capacities ...............................................................................................15 Table 2: Data sheet ...............................................................................................................15 Table 3: Cylinder allocation .................................................................................................16 Table 4: Performance characteristics ................................
Table 44: Reset response table ..............................................................................................69 Table 45: Default Register Values ........................................................................................70 Table 46: Diagnostic codes ...................................................................................................70 Table 47: Reset error register values ....................................................................................
Hitachi Global Storage Technologies Table 90: Read Native Max ADDRESS EXT (27h) ............................................................133 Table 91: Read Sectors (20h/21h) ........................................................................................134 Table 92: Read Sector(s) EXT Command (24h) ...................................................................135 Table 93: Read Verify Sectors (40h/41h) .............................................................................
1.0 General 1.1 Introduction This document describes the specifications of the following Travelstar 80GN, a 2.5-inch hard disk drive, ATA/IDE interface with a rotational speed of 4200 RPM and a height of 9.5 mm: Drive Name Model Number Capacity(GB) Height (mm) Rotational speeed Travelstar 80GN IC25N080ATMR04 80 GB 9.5 4200 Travelstar 80GN IC25N060ATMR04 60 GB 9.5 4200 Travelstar 80GN IC25N040ATMR04 40 GB 9.5 4200 Travelstar 80GN IC25N030ATMR04 30 GB 9.
ESD FCC FRU G Electrostatic Discharge Federal Communications Commission field replacement unit gravity (a unit of force) G2/Hz Gb GB GND h HDD Hz I ILS I/O ISO KB Kbpi kgf-cm KHz LBA Lw m max MB Mbps MHz MLC mm ms us, ms No O OD PIO POH Pop P/N p-p PSD RES RFI RH % RH (32 ft/sec)2 per Hertz 1,000,000,000 bits 1,000,000,000 bytes ground hexadecimal hard disk drive Hertz Input integrated lead suspension Input/Output International Standards Organization 1,000 bytes 1000 bits per inch kilogram (force)-centim
RMS root mean square RPM revolutions per minute RST reset R/W read/write sec second SELV secondary low voltage S.M.A.R.TSelf-Monitoring, Analysis, and Reporting Technology TPI tracks per inch Trk track TTL transistor-transistor logic UL Underwriters Laboratory V volt VDE Verband Deutscher Electrotechniker W watt 3-state transistor-transistor tristate logic 1.4 Caution • Do not apply force to the top cover (See figure below). • Do not cover the breathing hole on the top cover (See figure below).
1.5 Drive handling precautions Do not press on the drive cover during handling.
2.0 Outline of the drive • 2.5 inch, 9.
Travelstar 80GN Hard Disk Drive Specification 10
Part 1.
Travelstar 80GN Hard Disk Drive Specification 12
3.0 Fixed-disk subsystem description 3.1 Control electronics The control electronics works with the following functions: • AT Interface Protocol • Embedded Sector Servo • No-ID (TM) formatting • Multizone recording • Code: 96/102 MTR • ECC On-The-Fly • Enhanced Adaptive Battery Life Extender 3.
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4.0 Drive characteristics 4.
4.3 Cylinder allocation The table shows typical data format (96K TPI / 712K BPI). Each drive is formatted in the factory test by optimizing TPI/BPI combination. Contact Hitachi technical support for detail.
4.4 Performance characteristics Drive performance is characterized by the following parameters: • Command overhead • Mechanical head positioning - Seek time - Latency • Data transfer speed • Buffering operation (read ahead/write cache) Note: All the above parameters contribute to drive performance. There are other parameters that contribute to the performance of the actual system.
“Typical” and “Max” are used throughout this document and are defined as follows: Typical Average of the drive population tested at nominal environmental and voltage conditions. Max Maximum value measured on any one drive over the full range of the environmental and voltage conditions. (See Section 6.1, “Environment” on page 25 and Section 6.2, “DC power requirements” on page 27 for ranges.
4.4.2.4 Average latency Table 8: Average latency Rotational speed (RPM) Time for one revolution (ms) Average latency (ms) 4200 14.3 7.1 4.4.2.5 Drive ready time Table 9: Drive ready time Drive ready time (sec) Condition Power on to Ready Typical Max 3.0 9.5 Ready The condition in which the drive is able to perform a media access command (for example- read, write) immediately. Power on to Ready This includes the time required for the internal self diagnostics. 4.4.3 Operating modes 4.4.3.
Table 10: Description of operating modes Operating mode Description Standby The device interface is capable of accepting commands. The spindle motor is stopped. All circuitry but the host interface is in power saving mode. The spindle motor is stopped. All circuitry but the host interface is in power saving mode. Sleep The device requires a soft reset or a hard reset to be activated. All electronics, including spindle motor and host interface, are shut off. 4.4.3.
5.0 Data integrity 5.1 Data loss at power off Data loss will not be caused by a power off during any operation except the write operation. A power off during a write operation causes the loss of any received or resident data that has not been written onto the disk media. A power off during a write operation might make a maximum of one sector of data unreadable. This state can be recovered by a rewrite operation. 5.
5.4 WRITE safety The drive ensures that the data is written into the disk media properly. The following conditions are monitored during a write operation. When one of these conditions exceeds the criteria, the write operation is terminated and the automatic retry sequence is invoked. • Head off track • External shock • Low supply voltage • Spindle speed out of tolerance • Head open/short 5.
5.8 ECC The 52 byte four way interleaved ECC processor provides user data verification and correction capability. The first 4 bytes of ECC are check bytes for user data and the other 48 bytes are Read Solomon ECC. Each interleave has 12 bytes for ECC. Hardware logic corrects up to 20 bytes (5 bytes for each interleave) errors on-the-fly. Following are some examples of error cases. An "O" means that the byte contains no error. An "X" means that at least one bit of the byte is bad.
Travelstar 80GN Hard Disk Drive Specification 24
6.0 Specification 6.1 Environment 6.1.1 Temperature and humidity Table 13: Environmental condition Operating conditions Temperature 5 to 55ºC (See note below) Relative humidity 8 to 90%, non-condensing Maximum wet bulb temperature 29.
Specification (Environment) 100 41'C/95% 90 31'C/90% WetBulb 40'C Relative Humidity (%) 80 70 WetBulb29.4'C 60 Non Operating 50 Operating 40 65'C/23% 30 20 55'C/15% 10 0 -45 -35 -25 -15 -5 5 15 25 35 45 55 65 Temperature (degC) Figure 1: Limits of temperature and humidity 6.1.1.
Table 14: Magnetic flux density limits Frequency (KHz) Limits (uT RMS) 61–100 250 101–200 100 201–400 50 6.1.3 Conductive noise The disk drive shall work without soft error degradation in the frequency range from DC to 20 Mhz injected through any two of the mounting screw holes of the drive when an AC current of up to 45 mA (p-p) is applied through a 50-ohm resistor connected to any two mounting screw holes. 6.1.
Watts (RMS typical) 80GB, 60GB models 40GB, 30GB 20GB models Average from power on to ready 3.3 3.3 Footnotes: 1 The maximum fixed disk ripple is measured at the 5 volt input of the drive. 2 The disk drive shall not incur damage for an over voltage condition of +25% (maximum duration of 20 ms) on the 5 volt nominal supply. 3 The idle current is specified at an inner track. 4 The read/write current is specified based on three operations of 63 sector read/write per 100 ms.
common mode noise or voltage level difference between the system frame and power cable ground or AT interface cable ground should be in the allowable level specified in the power requirement section. 6.3.4 Service life and usage condition The drive is designed to be used under the following conditions: • • • • • • • • • The drive should be operated within specifications of shock, vibration, temperature, humidity, altitude, and magnetic field. The drive should be protected from ESD.
unloaded by routing the back EMF of the spinning motor to the voice coil. The actuator velocity is greater than the normal case and the unload process is inherently less controllable without a normal seek current profile. Emergency unload is intended to be invoked in rare situations. Because this operation is inherently uncontrolled, it is more mechanically stressful than a normal unload. The drive supports a minimum of 20,000 emergency unloads. 6.3.6.
6.4 Mechanical specifications 6.4.1 Physical dimensions and weight The following table lists the dimensions of the drive. Table 17: Physical dimensions and weight 80GB, 60GB 40GB, 30GB, 20GB Height [mm] 9.5±0.2 9.5±0.2 Width [mm] 69.85±0.25 69.85±0.25 Length [mm] 100.2±0.25 100.2±0.
6.4.2 Mounting hole locations The mounting hole locations and size of the drive are shown below. Figure 2: Mounting hole locations 6.4.3 Connector and jumper description A jumper is used to designate the drive address as either master or slave. The jumper setting method is described in Section 7.10, “Drive address setting” on page 55. Connector specifications are included in Section 7.2, “Interface connector” on page 39.
6.4.4 Mounting orientation The drive will operate in all axes (six directions) and will stay within the specified error rates when tilted ±5degrees from these positions. Performance and error rate will stay within specification limits if the drive is operated in the other permissible orientations from which it was formatted. Thus a drive formatted in a horizontal orientation will be able to run vertically and vice versa. The recommended mounting screw torque is 3.0±0.5 kgf-cm.
6.5.1.2 Swept sine vibration Table 19: Swept sine vibration Swept sine vibration (zero to peak 5 to 500 to 5 Hz sine wave) Sweep rate (oct/min) 9.8 m/sec2 (1 G) (5-500 Hz) 2.0 6.5.2 Nonoperating vibration The disk drive withstands the vibration levels described below without any loss or permanent damage. 6.5.2.1 Random vibration The test consists of a random vibration applied in each of three mutually perpendicular axes for a duration of 15 minutes per axis.
The input level shall be applied to the normal disk drive subsystem mounting points used to secure the drive in a normal system. 6.5.4 Nonoperating shock The drive withstands the following half-sine shock pulse without any data loss or permanent damage. Table 22: Nonoperating shock Duration of 1 ms Duration of 11 ms 7840 m/sec2 (800 G) 1176 m/sec2 (120 G) The shocks are applied for each direction of the drive for three mutually perpendicular axes, one axis at a time.
Tt = published seek time from one random track to another without including rotational latency T1= equivalent time in seconds for the drive to rotate by half a revolution 6.6.2 Discrete tone penalty Discrete tone penalties are added to the A-weighted sound power (Lw) with the following formula only when determining compliance. Lwt(spec) = Lw = 0.1Pt + 0.3 < 4.0 (Bels) where Lw = A-weighted sound power level Pt = Value of desecrate tone penalty = dLt – 6.
6.8.4 MIC mark The product complies with the Korea EMC standard. The regulation for certification of information and communication equipment is based on "Telecommunications Basic Act" and "Radio Waves Act." Korea EMC requirment are based technically on CISPR22:1993-12 measurement standards and limits. MIC standards are likewise based on IEC standards. 6.9 Safety The following shows the safety standards for different countries. 6.9.
Travelstar 80GN Hard Disk Drive Specification 38
7.0 Electrical interface specification 7.1 Cabling The maximum cable length from the host system to the hard disk drive plus circuit pattern length in the host system shall not exceed 18 inches. 7.2 Interface connector The signal connector for AT attachment is designed to mate with Dupont part number 69764-044 or equivalent. The figure below and Figure 2: “Mounting hole locations” on page 32 show the connector and pin location.
7.
Table 25: Special signal definitions for Ultra DMA Write Operation Read Operation Special Definition (for Ultra DMA) Conventional Definition DDMARDY- IORDY HSTROBE DIOR- STOP DIOW- HDMARDY- DIOR- DSTROBE IORDY STOP DIOW- 7.4 Signal descriptions DD00–DD15 A 16-bit bi-directional data bus between the host and the drive. The lower 8 lines, DD00-07, are used for Register and ECC access. All 16 lines, DD00–15, are used for data transfer. These are 3-state lines with 16mA current sink capability.
DASPThis is a time-multiplexed signal which indicates that a drive is active or that device 1 is present. This signal is driven by an Open-Drain driver and internally pulled up to 5.0 volts through a 10 k. resistor. During a PowerOn initialization or after RESET- is negated, DASP- shall be asserted by device 1 within 400 ms to indicate that device 1 is present. Device 0 shall allow up to 450 ms for device 1 to assert DASP-.
extend the PIO cycle. This line can be connected to the host IORDY signal in order to insert a WAIT state(s) into the host PIO cycle. This signal is an Open-Drain output with 16mA sink capability. 5V Power There are two input pins for the +5 V power supply. One is the "+5 V Logic" input pin and the second is the "+5 V Motor" input pin. These two input pins are tied together within the drive.
7.5 Interface logic signal levels The interface logic signals have the following electrical specifications: Inputs Voltage input high (ViH) Voltage input low (ViL) 2.0 V min./5.5 V max. –0.5 V min./0.8 V max. 2.4 V min. Outputs: Voltage output high at IoH min (VoH) Voltage output low at IoL min (VoL) Driver Sink Current (IoL) Driver Source Current (IoH) 16 mA min. Current 0.5 V max. 400 µA min. 7.
7.7 PIO timings The PIO cycle timings meet Mode 4 of the ATA/ATAPI-6 description.
7.8 Multi word DMA timings The Multi word DMA timings meet Mode 2 of the ATA/ATAPI-6 description.
7.9 Ultra DMA timings The Ultra DMA timings meet Mode 0, 1, 2, 3, 4 and 5 of the Ultra DMA Protocol. 7.9.
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7.10 Drive address setting A jumper placed on the interface connector determines the drive address. Three drive addresses are shown below. Two addresses require the setting of a jumper. 31 4 2 1 2 3 4 5 Figure 3: Drive address setting Setting 1—Device 0 (Master) (no jumper is used) Setting 2—Device 1 (Slave) Setting 3—Cable Select Setting 4—Do not attach a jumper here Setting 5—Do not attach a jumper here The default setting at shipment is Setting 1 (no jumper).
7.11 Addressing of HDD registers The host addresses the drive through a set of registers called a Task File. These registers are mapped into the host's I/O space. Two chip select lines (CS0- and CS1-) and three address lines (DA00–02) are used to select one of these registers, while a DIOR- or DIOW- is provided at the specified time. The chip select line CS0- is used to address the Command Block registers while the CS1- is used to address Control Block registers.
Part 2.
Travelstar 80GN Hard Disk Drive Specification 58
8.0 General 8.1 Introduction This specification describes the host interface of the Travelstar 80GN. The interface conforms to the Working Document of Information technology, AT Attachment with Packet Interface Extension (ATA/ATAPI-6) Revision 2, dated 2 August 2001, with certain limitations described in Section 9.0, “Deviations from standard” on page 61.
Travelstar 80GN Hard Disk Drive Specification 60
9.0 Deviations from standard The device conforms to the referenced specifications, with deviations described below. The interface conforms to the Working Document of Information Technology, AT Attachment with Packet Interface Extension (ATA/ATAPI-6) Revision 3, dated 30 October 2001, with the following deviation: Standby Timer Standby timer is enabled by STANDBY command or IDLE command. The value in the Sector Count register shall be used to determine the time programmed into the Standby timer.
Travelstar 80GN Hard Disk Drive Specification 62 September 19, 2003 10:28 am
10.
10.1 Alternate Status Register Table 38: Alternate Status Register 7 6 5 4 3 2 1 0 BSY RDY DF DSC DRQ COR IDX ERR This register contains the same information as the Status Register. The only difference between this register and the Status Register is that reading the Alternate Status Register does not imply an interrupt acknowledge or a clear of a pending interrupt. See Section 10.12, "Status Register," on page 67 for the definition of the bits in this register. 10.
10.4 Device Control Register Table 39: Device Control Register 7 6 5 4 3 2 1 0 HOB - - - 1 SRST -IEN 0 Bit Definitions HOB HOB (high order byte) is defined by the 48-bit Address feature set. A write to any Command Register shall clear the HOB bit to zero. SRST Software Reset. The device is held at reset when RST = 1. Setting RST = 0 again enables the device. To ensure that the device recognizes the reset, the host must set RST = 1 and wait for at least 5 ms before setting RST = 0.
10.6 Device/Head Register Table 41: Device Head/Register 7 6 5 4 3 2 1 0 1 L 1 DRV HS3 HS2 HS1 HS0 This register contains the device and head numbers. Bit Definitions L Binary encoded address mode select. When L = 0, addressing is by CHS mode. When L = 1, addressing is by LBA mode. DRV Device. When DRV = 0, device 0 (master) is selected. When DRV = 1, device 1 (Slave) is selected. HS3, HS2, HS0 Head Select. These four bits indicate the binary encoded address of the head.
10.8 Features Register This register is command specific. This register is used with the Set Features command, the S.M.A.R.T. Function Set command, and the Format Unit command. 10.9 LBA High Register This register is command specific. This is used with the Set Features command, S.M.A.R.T. Function Set command and Format Unit command. When 48-bit addressing commands are used, the "most recently written" content contains LBA Bits 16-23, and the "previous content" contains Bits 40-47.
Bit Definitions BSY Busy. Bit BSY=1 whenever the device is accessing the registers. The host should not read or write any registers when BSY=1. If the host reads any register when BSY=1, the contents of the Status Register will be returned. DRDY (RDY) Device Ready. When bit RDY=1 it indicates that the device is capable of responding to a command. Bit RDY will be set to 0 during power on until the device is ready to accept a command. DF Device Fault.
11.0 General 11.1 Reset response ATA has the following three types of resets: Power On Reset (POR) Hard Reset (Hardware Reset) Soft Reset (Software Reset) The device executes a series of electrical circuitry diagnostics, spins up the head disk assembly, tests speed and other mechanical parametric, and sets default values. The RESET signal is negated in the ATA Bus. The device resets the interface circuitry and sets the default values. The SRST bit in the Device Control Register is set and then is reset.
11.2 Register initialization After a power on, a hard reset, or a software reset, the register values are initialized as shown in the table below. Table 45: Default Register Values Register Default Value Error Sector Count LBA Low LBA Mid LBA High Device Status Alternate Status Diagnostic Code 01h 01h 00h 00h A0h 50h 50h If an Execute Device Diagnostic command is carried out, if the system is powered on, or if a hard reset occurs, the system generates an Error Register diagnostic code.
11.3 Diagnostic and Reset considerations The Set Max password, the Set Max security mode and the Set Max unlock counter are not retained over a Power On Reset but are retained over a Hard Reset or Soft Reset. For each Reset and Execute Device Diagnostic, the diagnostic is done as follows: Power On Reset, Hard Reset Soft Reset Execute Device Diagnostic DASP– is read by Device 0 to determine if Device 1 is present.
11.4 Power-off considerations 11.4.1 Load/Unload Load/Unload is a functional mechanism of the hard disk drive. It is controlled by the drive microcode. Specifically, unloading of the heads is invoked by the following commands. Table 48: Device behavior by ATA command Command Response Standby Standby Immediate Sleep Reset UL -> Comp. UL -> Comp. UL -> Comp.
You may then turn off the drive in the following order: 1. Issue Standby Immediate or sleep command 2. Wait until COMMAND COMPLETE STATUS is returned. (It may take up to 350 ms in a typical case.) 3. Terminate power to drive This power-down sequence should be followed for entry into any system power-down state, system suspend state, or system hibernation state. In a robustly designed system, emergency unload is limited to rare scenarios such as battery removal during operation. 11.
11.6 Power management features The power management feature set permits a host to modify the behavior in a manner which reduces the power required to operate. The power management feature set provides a set of commands and a timer that enables a device to implement low power consumption modes. The drive implements the following set of functions: • • • • • • A Standby timer Idle command Idle Immediate command Sleep command Standby command Standby Immediate command 11.6.
11.6.4 Standby timer The standby timer provides a method for the device to automatically enter standby mode from either active or idle mode following a host programmed period of inactivity. If the device is in the active or idle mode, the device waits for the specified time period and if no command is received, the device automatically enters the standby mode.
increase with increasing advanced power management levels. The advanced power management levels contain discrete bands, described in the section of Set Feature command in detail. This feature set uses the following functions: • A SET FEATURES subcommand to enable Advanced Power Management • A SET FEATURES subcommand to disable Advanced Power Management The Advanced Power Management feature is independent of the Standby timer setting.
11.8 S.M.A.R.T. Function The intent of Self-monitoring, analysis, and reporting technology (S.M.A.R.T.) is to protect user data and prevent unscheduled system downtime that may be caused by predictable degradation and/or fault of the device. By monitoring and storing critical performance and calibration parameters, S.M.A.R.T. devices employ sophisticated data analysis algorithms to predict the likelihood of near-term degradation or fault condition.
11.8.6 S.M.A.R.T. operation with power management modes The device saves attribute values automatically on every head unload timing except the emergency unload, even if the attribute auto save feature is not enabled. The head unload is done not only by Standby, Standby Immediate, Sleep command, and Hard Reset, but also by the Standby timer. So it is not necessary for a host system to enable the attribute auto save feature when it utilizes the power management.
11.9.3 Password This function can have two types of passwords as described below. Master Password When the Master Password is set, the device does NOT enable the Device Lock Function, and the device CANNOT be locked with the Master Password, but the Master Password can be used for unlocking the locked device. The User Password should be given or changed by a system user.
11.9.4.3 Operation from POR after user password is set When Device Lock Function is enabled, the device rejects media access command until a Security Unlock command is successfully completed.
11.9.4.4 User Password lost If the User Password is forgotten and High level security is set, the system user cannot access any data. However the device can be unlocked using the Master Password. If a system user forgets the User Password and Maximum security level is set, data access is impossible. However the device can be unlocked using the Security Erase Unit command to unlock the device and erase all user data with the Master Password.
11.9.5 Command table This table shows the device's response to commands when the Security Mode Feature Set (Device lock function) is enabled.
Table 53: Command table for device lock operation Security Freeze Lock o x o o x o Security Set Password x o x Security Erase Unit Write Long Write Multiple Write Multiple EXT Write Sector(s) Write Sector(s) EXT Security Unlock Seek o o o o x o Write Verify x x x x x x o o o o o o o o o o o o 11.10 Protected Area Function Protected Area Function provides a protected area which cannot be accessed via conventional methods.
Issue Read Native Max ADDRESS command to get the real device max of LBA/CYL. Returned value shows that native device Max LBA is 0FFFFFh regardless of the current setting. Make the entire device accessible, including the protected area, by setting the device Max LBA as 0FFFFFh via Set Max ADDRESS command. The option could be either nonvolatile or volatile. Test the sectors for protected area (LBA > = 0FC000h) if required. Write information data such as BIOS code within the protected area.
This command requests a transfer of a single sector of data from the host. The figure shown above defines the content of this sector of information. The password supplied in the sector of data transferred is compared with the stored Set Max password. If the password compare fails, then the device returns command aborted and decrements the unlock counter.
cleared by Subcommand 89h Disable Address Offset Mode, Hardware reset or Power on Reset. If Reverting to Power on Defaults has been enabled by Set Features command, it is cleared by Soft reset as well. Upon entering offset mode the capacity of the drive returned in the Identify Device data is the size of the former protected area. A subsequent Set Max Address command with the address returned by the Read Max Address command allows access to the entire drive.
11.12 Seek Overlap The drive provides accurate seek time measurement method. The seek command is usually used to measure the device seek time by accumulating execution time for a number of seek commands. With typical implementation of the seek command, this measurement must include the device and host command overhead. To eliminate this overhead, the drive overlaps the seek command as described below. The first seek command completes before the actual seek operation is over.
11.14 Reassign Function The Reassign Function is used with read commands and write commands. The sectors of data for reassignment are prepared as the spare data sector. The one entry can register 256 consecutive sectors maximum. This reassignment information is registered internally, and the information is available right after completing the reassign function. Also the information is used on the next power on reset or hard reset.
11.15 48-bit Address Feature Set The 48-bit Address feature set allows devices with capacities up to 281,474,976,710,655 sectors. This allows device capacity up to 144,115,188,075,855,360 bytes. In addition, the number of sectors that may be transferred by a single command are increased by increasing the allowable sector count to 16 bits.
Travelstar 80GN Hard Disk Drive Specification 90
12.0 Command protocol The commands are grouped into different classes according to the protocols followed for command execution. The command classes with their associated protocols are defined below. For all commands, the host must first check to see if BSY = 1, and should proceed no further unless and until BSY = 0. For all commands, the host must also wait for RDY = 1 before proceeding. A device must maintain either BSY = 1 or DRQ = 1 at all times until the command is completed.
4. For the Read Long command: a. The device sets BSY = 1 and prepares for data transfer. b. When the sector of data is available for transfer to the host, the device sets BSY = 0 and DRQ=1 and interrupts the host. c. In response to the interrupt, the host reads the Status Register. d. The device clears the interrupt in response to the Status Register being read. e. The host reads the sector of data including ECC bytes via the Data Register. f.
• • Write Sector(s) EXT Write Verify Execution includes the transfer of one or more 512 byte (> 512 bytes on Write Long) sectors of data from the host to the device. 1. The host writes any required parameters to the Features, Sector Count, LBA, and Device Registers. 2. The host writes the command code to the Command Register. 3. The device sets BSY = 1. 4. For each sector (or block) of data to be transferred: a. b. c. d. e. The devics BSY = 0 and DRQ = 1 when it is ready to receive a sector (or block).
• • • • • • • • • • • • • • • • • • • • • • • • • • • • • Format Unit Idle Idle Immediate Initialize Device Parameters Read Native Max ADDRESS Read Native Max ADDRESS EXT Read Verify Sector(s) Read Verify Sector(s) EXT Recalibrate Security Erase Prepare Security Freeze Lock Seek Sense Condition Set Features Set Max ADDRESS Set Max ADDRESS EXT Set Max LOCK Set Max FREEZE LOCK Set Multiple Mode Sleep S.M.A.R.T. Disable Operations S.M.A.R.T. Enable/Disable Attribute Auto save S.M.A.R.T.
12.4 DMA Data Transfer commands: • • • • Read DMA Read DMA EXT Write DMA Write DMA EXT Data transfers using DMA commands differ in two ways from PIO transfers: • • Data transfers are performed using the Slave DMA channel No intermediate sector interrupts are issued on multisector commands. Initiation of the DMA transfer commands is identical to the Read Sector or Write Sector commands with one exception: the host initializes the Slave DMA channel prior to issuing the command.
Travelstar 80GN Hard Disk Drive Specification page 96
13.0 Command descriptions The table below shows the commands that are supported by the device. Table 60: “Command Set (subcommand)” on page 99 shows the subcommands that are supported by each command or feature.
Table 59: Command Set (2 of 2) ProtoCommand col 3 3 3 3 3 2 2 3 3 3 3 3 3 3 3 1 1 1 3 3 2 3 3 3 3 2 4 4 4 2 2 2 2 2 2 2 2 Code (Hex) Set Features Set Max ADDRESS Set Max ADDRESS EXT Set Max FREEZE LOCK Set Max LOCK Set Max SET PASSWORD Set Max UNLOCK Set Multiple Mode Sleep Sleep* S.M.A.R.T. Disable Operations S.M.A.R.T. Enable/Disable Attribute Auto save S.M.A.R.T. Enable/Disable Automatic Off-line S.M.A.R.T. Enable Operations S.M.A.R.T. Execute Off-line Immediate S.M.A.R.T. Read Attribute Values S.M.A.
Table 60: Command Set (subcommand) Command Code (Hex) Feature Register (Hex) B0 B0 B0 B0 B0 B0 B0 B0 B0 B0 B0 D0 D1 D2 D3 D4 D5 D6 D8 D9 DA DB Set Features Enable Write Cache Set Transfer mode Enable Advanced Power Management feature Enable Address Offset mode 40 bytes of ECC apply on Read/Write Long Disable read look-ahead feature Disable reverting to power on defaults Disable write cache Disable Advanced Power Management feature Disable Address Offset mode Enable read look-ahead feature 4 bytes of ECC
The following symbols are used in the command descriptions. Input registers 0 1 H V N - This indicates that the bit is always set to 0. This indicates that the bit is always set to 1. Head number. This indicates that the head number part of the Device/Head Register is an input parameter and will be set by the device. Valid. This indicates that the bit is part of an input parameter and will be set by the device to 0 or 1. Not recommended condition for start up.
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13.2.3 DEVICE CONFIGURATION IDENTIFY (subcommand C2h) The DEVICE CONFIGURATION IDENTIFY command returns a 512 byte data structure via PIO data-in transfer. The content of this data structure indicates the selectable commands, modes, and feature sets that the device is capable of supporting.
Table 64: Device Configuration Overlay Data structure Word Content 0 1 0001h Data Structure revision Multiword DMA modes supported 15-3 Reserved 2 1 = Multiword DMA mode 2 and below are supported 1 1 = Multiword DMA mode 1 and below are supported 0 1 = Multiword DMA mode 0 is supported Ultra DMA modes supported 15-6 Reserved 5 1 = Ultra DMA mode 5 and below are supported 4 1 = Ultra DMA mode 4 and below are supported 3 1 = Ultra DMA mode 3 and below are supported 2 1 = Ultra DMA mode 2 and below are supp
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Table 72: Identify device information. (Part 1 of 7) Word Content Description 00 045AH drive classibit assignments fication 15(=0) 1=ATAPI device, 0=ATA device 14(=0) 1=format speed tolerance gap required 13(=0) 1=track offset option available 12(=0) 1=data strobe offset option available 11(=0) 1=rotational speed tolerance > 0.
Table 73: Identify device information.
Table 74: Identify device information. (Part 3 of 7) Word Content 64 0003H 65 0078H 66 0078H 67 00F0H 68 0078H 69-79 80 81 82 0000H 007C 0019 746BH Description Flow Control PIO Transfer Modes Supported 15- 8(=0) Reserved 7- 0(=3) Advanced PIO Transfer Modes Supported '11' = PIO Mode 3 and 4 Supported Minimum Multiword DMA Transfer Cycle Time Per Word 15- 0(=78h) Cycle time in nanoseconds (120 ns, 16.
Table 75: Identify device information.
Table 76: Identify device information.
Table 77: Identify device information.
Table 78: Identify device information. (Part 7 of 7) Word Content 128 0XXXH 129 000XH * 130 131 XXXXH 000XH * * 132254 255 XXXXH * XXA5H Description Security Mode Feature. Bit assignments 15-9(=0) Reserved 8(=X) Security Level: 1= Maximum, 0= High 7-6(=0) Reserved 5(=0) 1=Enhanced security erase supported 4(=0) 1=Security count expired 3(=0) 1=Security Frozen 2(=0) 1=Security Locked 1(=0) 1=Security Enabled **0(=0) 1=Security Support Current Set Feature Option.
Table 79: Number of cylinders/heads/sectors by model.
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Travelstar 80GN Hard Disk Drive Specification 121
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Input parameters from the device Sector Count This indicates the number of requested sectors not transferred. This will be zero, unless an unrecoverable error occurs. LBA Low This indicates the sector number of the last transferred sector. (L = 0). In LBA mode this register contains the current LBA bits 0–7. (L = 1) LBA High/Low This indicates the cylinder number of the last transferred sector. (L = 0). In LBA mode this register contains the current LBA bits 8–15 (Mid) and bits16–23 (High).
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Input parameters from the device LBA Low (HOB=0) LBA (7-0) of the address of the first unrecoverable error LBA Low (HOB=1) LBA (31-24) of the address of the first unrecoverable error LBA Mid (HOB=0) LBA (15-8) of the address of the first unrecoverable error LBA Mid (HOB=1) LBA (39-32) of the address of the first unrecoverable error LBA High (HOB=0) LBA (23-16) of the address of the first unrecoverable error LBA High (HOB=1) LBA (47-40) of the address of the first unrecoverable error Travelstar 8
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LBA Low This indicates the sector number of the transferred sector. (L = 0) In LBA mode, this register contains current LBA bits 0–7. (L = 1) LBA High/Low This indicates the cylinder number of the transferred sector. (L = 0) In LBA mode, this register contains current LBA bits 8–15 (Low), 16–23 (High). (L = 1) H This indicates the head number of the transferred sector. (L = 0) In LBA mode, this register contains current LBA bits 24–27.
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LBA High/Low This indicates the cylinder number of the last transferred sector. (L = 0) In LBA mode, this register contains current LBA bits 8–15 (Mid), 16–23 (High). (L = 1) H This indicates the head number of the last transferred sector. (L = 0) In LBA mode, this register contains current LBA bits 24–27.
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Input parameters from the device LBA Low (HOB=0) LBA (7-0) of the address of the first unrecoverable error LBA Low (HOB=1) LBA (31-24) of the address of the first unrecoverable error LBA Mid (HOB=0) LBA (15-8) of the address of the first unrecoverable error LBA Mid (HOB=1) LBA (39-32) of the address of the first unrecoverable error LBA High (HOB=0) LBA (23-16) of the address of the first unrecoverable error LBA High(HOB=1) LBA (47-40) of the address of the first unrecoverable error Travelstar 80
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LBA High/Low This is the cylinder number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 8–15 (Mid) and bits 16–23 (High).(L = 1) H This is the head number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 24–27.
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Input parameters from the device LBA Low (HOB=0) LBA (7-0) of the address of the first unrecoverable error LBA Low (HOB=1) LBA (31-24) of the address of the first unrecoverable error LBA Mid (HOB=0) LBA (15-8) of the address of the first unrecoverable error LBA Mid (HOB=1) LBA (39-32) of the address of the first unrecoverable error LBA High (HOB=0) LBA (23-16) of the address of the first unrecoverable error LBA High(HOB=1) LBA (47-40) of the address of the first unrecoverable error Travelstar 80
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This command disables the security mode feature (device lock function), however, the master password is still stored internally within the device and may be reactivated later when a new user password is set. If you execute this command on disabling the security mode feature (device lock function), the password sent by the host is NOT compared with the Master Password and the User Password. The device only erases all user data.
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Security Level A zero indicates a High level, a one indicates a Maximum level. If the host sets the High level and the password is forgotten then the Master Password can be used to unlock the device. If the host sets the Maximum level and the user password is forgotten, only a Security Erase Prepare/Security Unit command can unlock the device and all data will be lost. Password The 32 bytes are always significant in the text of the password.
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Note 1. When the Feature register is 03h (= Set Transfer mode) the Sector Count Register specifies the transfer mechanism. The upper 5 bits define the type of transfer and the low order 3 bits encode the mode value.
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If a host protected area has been established by a Set Max Address Ext command, the device shall return command aborted.Output parameters to the device. Feature Destination code for this command 01h SET MAX SET PASSWORD 02h SET MAX LOCK 03h SET MAX UNLOCK 04h SET MAX FREEZE LOCK When the Set Max ADDRESS command is executed, this register is ignored. B This indicates the option bit for selection whether nonvolatile or volatile. B = 0 is the volatile condition.
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Output parameters to the device B Option bit for selection whether nonvolatile or volatile. B=0 is volatile condition. When B=1, MAX Address which is set by Set Max Address Ext command is preserved by POR. When B=0, MAX Address which is set by Set Max Address Ext command will be lost by POR. B=1 is not valid when the device is in Address Offset mode.
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13.38 S.M.A.R.T. Function Set (B0h) Table 112: S.M.A.R.T.
13.38.1 S.M.A.R.T. Function Subcommands 13.38.1.1 S.M.A.R.T. Read Attribute Values (subcommand D0h) This subcommand returns the device's Attribute Values to the host. Upon receipt of the S.M.A.R.T. Read Attribute Values subcommand from the host, the device asserts BSY, saves any updated Attribute Values to the Attribute Data sectors, asserts DRQ, clears BSY, asserts INTRQ, and then waits for the host to transfer the 512 bytes of Attribute Value information from the device via the Data Register. 13.38.1.
13.38.1.5 S.M.A.R.T. Execute Off-line Immediate (subcommand D4h) This subcommand causes the device to immediately initiate the set of activities that collect Attribute data in an offline mode (off-line routine) or execute a self-test routine in either captive or off-line mode. The LBA Low register shall be set to specify the operation to be executed. LBA Low 0 1 2 127 129 130 Operation to be executed Execute S.M.A.R.T. off-line data collection routine immediately Execute S.M.A.R.T.
S.M.A.R.T.—either enabled or disabled—will be preserved by the device across power cycles. Once enabled, the receipt of subsequent S.M.A.R.T. Enable Operations subcommands will not affect any of the Attribute Values. Upon receipt of the S.M.A.R.T. Enable Operations subcommand from the host, the device asserts BSY, enables S.M.A.R.T. capabilities and functions, clears BSY, and asserts INTRQ. 13.38.1.9 S.M.A.R.T. Disable Operations (subcommand D9h) This subcommand disables all S.M.A.R.T.
The Sector Count register shall be set to specify the feature to be enabled or disabled: Sector Count 00h 01h F8h F9h Feature Description Disable Automatic Off-line Disable Off-line Read Scanning Enable Automatic Off-line Enable Off-line Read Scanning A value of zero written by the host into the device's Sector Count register before issuing this subcommand shall cause the automatic off-line data collection feature to be disabled.
13.38.2 Device Attribute Data Structure The following defines the 512 bytes that make up the Attribute Value information. This data structure is accessed by the host in its entirety using the S.M.A.R.T. Read Attribute Values subcommand. All multibyte fields shown in these data structures follow the ATA/ATAPI-5 specification for byte ordering, namely, that the least significant byte occupies the lowest numbered byte address location in the field.
13.38.2.2 Individual Attribute Data Structure The following defines the 12 bytes that make up the information for each Attribute entry in the Device Attribute Data Structure.
Table 114: Status Flag definitions Bit 0 1 Flag Name Pre-Failure/ Advisory bit Definition If bit = 0, an Attribute Value less than or equal to its corresponding Attribute Threshold indicates an Advisory condition where the usage or age of the device has exceeded its intended design life period. If bit = 1, an Attribute Value less than or equal to its corresponding Attribute Threshold indicates a Pre-Failure condition where imminent loss of data is being predicted.
13.38.2.4 Self-test execution status Bit Definition 0-3 Percent Self-test remaining. An approximation of the percent of the self-test routine remaining until completion given in ten percent increments. Valid values are 0 through 9. 4-7 Current Self-test execution status. 0 The self-test routine completed without error or has never been run. 1 The self-test routine was aborted by the host. 2 The self-test routine was interrupted by the host with a hard or soft reset.
3 4 5-7 Off-line Read Scanning implemented bit 0 The device does not support Off-line Read Scanning 1 The device supports Off-line Read Scanning Self-test implemented bit 0 Self-test routing is not implemented 1 Self-test routine is implemented Reserved (0) 13.38.2.8 S.M.A.R.T. Capability This word of bit flags describes the S.M.A.R.T. capabilities of the device.
13.38.3 Device Attribute Thresholds data structure The following defines the 512 bytes that make up the Attribute Threshold information. This data structure is accessed by the host in its entirety using the S.M.A.R.T. Read Attribute Thresholds. All multibyte fields shown in these data structures follow the ATA-3 specification for byte ordering, that is, that the least significant byte occupies the lowest numbered byte address location in the field.
13.38.3.3 Attribute ID Numbers Attribute ID Numbers supported by the device are the same as Attribute Values Data Structures. 13.38.3.4 Attribute Threshold These values are preset at the factory and are not meant to be changeable. However, the host might use the "S.M.A.R.T. Write Attribute Threshold" subcommand to override these preset values in the Threshold sectors. 13.38.3.
13.38.4.5 Command data structure Data format of each command data structure is shown below. Table 118: Command data structure Description Byte Offset 1 1 1 1 1 1 1 1 00h 01h 02h 03h 04h 05h 06h 07h 4 08h Device Control register Features register Sector count register LBA Low register LBA Mid register LBA High register Device register Command register Time stamp (milliseconds from Power On) 12 13.38.4.6 Error data structure Data format of error data structure is shown below.
13.38.5 Self-test log data structure The following defines the 512 bytes that make up the Self-test log sector. All multibyte fields shown in these data structures follow the ATA/ATAPI-5 specifications for byte ordering. Table 120: Self-test log data structure Description Data structure revision Self-test number Self-test execution status Life time power on hours Self-test failure check point LBA of first failure Vendor specific ...
13.38.6 Error reporting The following table shows the values returned in the Status and Error Registers when specific error conditions are encountered by a device. Table 121: S.M.A.R.T. Error Codes Error condition A S.M.A.R.T. FUNCTION SET command was received by the device without the required key being loaded into the LBA High and LBA Mid registers. A S.M.A.R.T.
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LBA Low This indicates the sector number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 0–7. (L = 1) LBA High/Mid This indicates the cylinder number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 8–15 (Mid) and bits 16–23 (High). (L = 1) H This indicates the head number of the last transferred sector. (L = 0) LBA mode this register contains the current LBA bits 24–27.
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LBA High Current LBA (23-16) LBA High Previous LBA (47-40) Input parameters from the device LBA Low (HOB=0) LBA (7-0) of the address of the first unrecoverable error LBA Low (HOB=1) LBA (31-24) of the address of the first unrecoverable error LBA Mid (HOB=0) LBA (15-8) of the address of the first unrecoverable error LBA Mid (HOB=1) LBA (39-32) of the address of the first unrecoverable error LBA High (HOB=0) LBA (23-16) of the address of the first unrecoverable error LBA High(HOB=1) LBA (47-40)
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LBA High/Mid This indicates the cylinder number of the sector to be transferred. (L = 0) In LBA mode this register contains current the LBA bits 8–15 (Mid) and bits 16–23 (High). (L = 1) H This indicates the head number of the sector to be transferred. (L = 0) In LBA mode this register contains current the LBA bits 24–27. (L = 1) The drive internally uses 40 bytes of ECC on all data read or writes. The 4-byte mode of operation is provided via an emulation technique.
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Input parameters from the device LBA Low (HOB=0) LBA (7-0) of the address of the first unrecoverable error LBA Low (HOB=1) LBA (31-24) of the address of the first unrecoverable error LBA Mid (HOB=0) LBA (15-8) of the address of the first unrecoverable error LBA Mid (HOB=1) LBA (39-32) of the address of the first unrecoverable error LBA High (HOB=0) LBA (23-16) of the address of the first unrecoverable error LBA High(HOB=1) LBA (47-40) of the address of the first unrecoverable error Travelstar 80
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LBA High/Mid This indicates the cylinder number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 8–15 (Mid) and bits 16–23 (High). (L = 1) H This indicates the head number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 24–27.
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Input parameters from the device LBA Low (HOB=0) LBA (7-0) of the address of the first unrecoverable error LBA Low (HOB=1) LBA (31-24) of the address of the first unrecoverable error LBA Mid (HOB=0) LBA (15-8) of the address of the first unrecoverable error LBA Mid (HOB=1) LBA (39-32) of the address of the first unrecoverable error LBA High (HOB=0) LBA (23-16) of the address of the first unrecoverable error LBA High(HOB=1) LBA (47-40) of the address of the first unrecoverable error 13.
Travelstar 80GN Hard Disk Drive Specification 192
14.0 Time-out values The timing of BSY and DRQ in Status Register are shown in the table below.
We recommend that the host system execute Soft reset and then retry to issue the command if the host system time-out would occur for the device. Note 1. For SECURITY ERASE UNIT command, the execution time is referred to 13.27, “Security Erase Unit (F4h)” on page 145. Note 2. For FORMAT UNIT command, the execution time is referred to 13.7, “Format Unit (F7h: vendor specific)” on page 109. Note 3.
15.0 Appendix 15.1 Commands Support Coverage The table below compares the command support coverage of the Travelstar 80GN with the ATA-6 defined command set. The third column indicates the capability of the Travelstar 80GN for those commands.
Table 133: Command coverage (2 of 2) Code Command Name Implementation for Travelstar 80GN ATA-6 Category Type C8h READ DMA Yes Mandatory C9h READ DMA Yes Obsoleted CAh WRITE DMA Yes Mandatory CBh WRITE DMA Yes Obsoleted CCh WRITE DMA QUEUED No Optional CDh CFA WRITE MULTIPLE W/O ERASE No Optional (Note 7) DAh GET MEDIA STATUS No Optional (Note 7) DEh MEDIA LOCK No Optional (Note 7) DFh MEDIA UNLOCK No Optional (Note 7) E0h STANDBY IMMEDIATE Yes Mandatory E1h IDLE
Note 4. Power Management Feature Set Note 5. S.M.A.R.T. Function Set Note 6. Security Mode Feature Set Note 7. Removable 15.2 SET FEATURES Commands Support Coverage The following table provides a list of Feature Registers, Feature Names, and implementation for the Travelstar 80GN. The third column indicates whether or not the Travelstar 80GN has the capability of executing the command in comparison to the ATA-6 defined command set. For detailed operation, refer to section 13.
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Travelstar 80GN Hard Disk Drive Specification 199
Travelstar 80GN Hard Disk Drive Specification 200
Hitachi Global Storage Technologies Index A Abbreviations ................................................5 Acoustics .......................................................35 Address Offset Feature .................................85 Advanced Power Management (ABLE-3) feature 75 Appendix .......................................................193 B BSMI mark ...................................................36 C Cable noise interference ................................28 Capacity, formatted ..............
Mechanical positioning .................................17 Mechanical specifications .............................31 Mode transition time .....................................20 Mounting hole locations ...............................32 Mounting orientation ....................................33 N Non-data commands .....................................93 O Operating modes description ...............................................19 P Packaging ......................................................
Hitachi Global Storage Technologies V Vibration .......................................................33 W Write Buffer ..................................................177 Write Cache function ....................................87 Z Zone ..............................................................
© Copyright Hitachi Global Storage Technologies Hitachi Global Storage Technologies 5600 Cottle Road San Jose, CA 95193 Produced in the United States 9/03 All rights reserved Travelstar™ is a trademark of HitachiGlobal Storage Technologies. Microsoft, Windows XP, and Windows are trademarks of Microsoft Corporation in the United States, other countries, or both. Other product names are trademarks or registered trademarks of their respective companies.
