Datasheet

7K500 OEM Specification
Page 165 of 176
14.47
14.4714.47
14.47 Write
Write Write
Write FP
FPFP
FPDMA
DMA DMA
DMA Queued
Queued Queued
Queued (
((
(61
6161
61h)
h) h)
h)
Command Block Output Registers
Command Block Input Registers
Register 7
6
5
4
3
2
1
0
Register 7
6
5
4
3
2
1
0
Data Low -
-
-
-
-
-
-
-
Data Low -
-
-
-
-
-
-
-
Data High -
-
-
-
-
-
-
-
Data High -
-
-
-
-
-
-
-
Current V
V
V
V
V
V
V
V
Error ...See Below... Feature
Previous V
V
V
V
V
V
V
V
Current T
T
T
T
T
-
-
-
HOB=0
-
-
-
-
-
-
-
-
Sector Count
Previous P
-
-
-
-
-
-
-
Sector Count
HOB=1
-
-
-
-
-
-
-
-
Current V
V
V
V
V
V
V
V
HOB=0
V
V
V
V
V
V
V
V
LBA Low
Previous V
V
V
V
V
V
V
V
LBA Low
HOB=1
V
V
V
V
V
V
V
V
Current V
V
V
V
V
V
V
V
HOB=0
V
V
V
V
V
V
V
V
LBA Mid
Previous V
V
V
V
V
V
V
V
LBA Mid
HOB=1
V
V
V
V
V
V
V
V
Current V
V
V
V
V
V
V
V
HOB=0
V
V
V
V
V
V
V
V
LBA High
Previous V
V
V
V
V
V
V
V
LBA High
HOB=1
V
V
V
V
V
V
V
V
Device F
1
-
-
-
-
-
-
Device -
-
-
-
-
-
-
-
Command 0
1
1
0
0
0
0
1
Status ...See Below...
Error Register
Status Register
7 6 5
4 3
2 1 0
7 6 5
4 3 2 1 0
CRC
UNC
0
IDN
0
ABT
T0N
AMN
BSY
RDY
DF
DSC
DRQ
COR
IDX
ERR
V 0 0
V 0
V 0 0
0 V 0
V - 0 0 V
Table 131 Write FPDMA Queued Command (61h)
Output Parameters To The Device
Feature Current
The number of sectors to be transferred low order, bit (7:0)
Feature Previous
The number of sectors to be transferred high order, bit (15:8)
T
TAG value. It shall be assigned to be different from all other queued commands.
The value shall not exceed the maximum queue depth specified by the Word 75 of the
Identify Device information.
LBA Low Current
LBA (7:0).
LBA Low Previous
LBA (31:24).
LBA Mid Current
LBA (15:8).
LBA Mid Previous
LBA (39:32).
LBA High Current
LBA (23:16).
LBA High Previous
LBA (47:40).
F
FUA bit. When the FUA bit is set to 1, the completion status is indicated after the
transferred data are written to the media also when Write Cache is enabled. When the
FUA bit is set to 0, the completion status may be indicated before the transferred data
are written to the media successfully when Write Cache is enabled.
P
Priority bit. When the Priority bit is set to 1, the device attempts to provide better
quality of service for the command than normal priority commands.
Input Parameters From The Device
LBA Low (HOB=0)
LBA (7:0) of the address of the first unrecoverable error.
LBA Low (HOB=1)
LBA (31:24) of the address of the first unrecoverable error.
LBA Mid (HOB=0)
LBA (15:8) of the address of the first unrecoverable error.
LBA Mid (HOB=1)
LBA (39:32) of the address of the first unrecoverable error.
LBA High (HOB=0)
LBA (23:16) of the address of the first unrecoverable error.
LBA High (HOB=1)
LBA (47:40) of the address of the first unrecoverable error.