Data Sheet
LINEAR MAGNETIC FIELD SENSORS
9
Single Clock Circuitry—
Some form of clock is needed to
trigger the set and reset pulses (Figure 6) to create the
switching signal. The circuit shown in Figure 8 can be used
to create a strong (>4Amp) pulse. The diodes, resistors,
capacitors and inverters basically create the TRS and the
TSR delays. Now a single signal (Clock) can trigger a set or
reset pulse. The minimum timing between the rising and
falling edges of Clock are determined by the 25KΩ and 1nF
time constant. That is, the minimum high and low time for
Clock is ≈25 µs.
Micro Processor—
The circuit in Figure 9 generates a strong
set/reset pulse (>4 Amp) under microprocessor control. The
TSRTRS
SET
RESET
S/R
16
V
-16
V
TRS ≥ 5 µsec
TSR ≥ 5 µsec
TPW ≈ 2 µsec
5
V
TPW
set
reset
S
/
R
strap
@
4.5Ω typ.
3A peak (min.)
SET
10
K
1
0.22µ
F
4.7µ
F(
1
)
25
K
+16 to 20V
17
HMC
2003
2
N
3904
RESET
S/R
IRF7106 (2)
1
2
4
3
5,6
7,8
(
1
)T
anta
l
um,
l
ow
R
(2) HEXFETs with ≈0.2Ω Ron
25
K
0.1µ
F
Figure 9—Set/Reset Circuit With Microprocessor Control (1001/1002)
SET and RESET signals are generated from a
microprocessor and control the P and N channel HEXFET
drivers (IRF7105). The purpose of creating the TRS and the
TSR delays are to make sure that one HEXFET is off before
the other one turns on. Basically, a break-before-make
switching pattern. The current pulse is drawn from the 4.7
µF capacitor. If the 5V to 20V converter is used as shown in
Figure 7, then the resultant noise and droop on the 16-20V
supply is not an issue. But if the 16-20V supply is used
elsewhere in the system, then a series dropping resistor
(≈500Ω) should be placed between the 4.7µF capacitor and
the supply.
Clock
S/R
16
V
-16
V
TPW ≈ 2 µsec
5
V
set
reset
Figure 6—Single Clock Set/Reset Timing
Figure 7—5V to 20V Converter
0.22µ
F*
1
2
8
7
5
SHDN
V
cc
GND
C
1-
C
1+
1µ
F
V
ou
t
4
3
C
2+
C
2-
0.22µ
F*
1µ
F
1
N
5818
20
V
6
5
V
MAX
662
A
*U
se tanta
l
um capac
i
tors
12
V
2µ
F
1µ
F
10
K
25
K
+16 to 20V
2
N
3904
25
K
0.1µ
F
S
/
R
strap
@
4.5Ω typ.
3A peak (min.)
Cloc
k
1
0.22µ
F(
2
)
4.7µ
F(
3
)
17
HMC
2003
S/R
(
1
) HEXFET
s w
i
t
h
≈0.2Ω
R
on
(2) 0.22µF Tantalum or a
0.68 µF Ceramic CK06
(3) Tantalum, low R
25
K
25
K
1n
F
1n
F
8943
21
65
7
14
5
V
74
HC
04
1
N
4001
IRF7106 (1)
1
2
4
3
5,6
7,8
Figure 8—Single Clock Set/Reset Pulse Circuit (1001/1002)
*
*
•HMC2003 contains one HMC1001 and one HMC1002; together they make the 3-axis sensor.
Three S/R straps are in serial, the total resistance is ~4.5Ω.