Product Drawings

DxDESIGNER
SCALE:
DRAWING NO.SIZE REV
D
12
345
6
7
8
A
B
C
D
HONEYWELL INTERNATIONAL INC.
A
B
C
D
12
345
6
7
8
DRAWN BY
12/09/2018:13:43
NONE
CPO-PC200,CPO-PC400,CPO-PC400W
A
HOME & BUILDING TECHNOLOGIES
HONEYWELL CONFIDENTIAL
AND PROPRIETARY
M Back
25OCT2017
Number
SOM Board
E&ES COMMON CPU
PROCESSOR 3of4 - eMMC, SDIO, Ethernet ,
GPIO and Boot Config
ENET1
ENET2
SDIO_2
ENET1
ENET2
SDIO_4
SDIO_2
SDIO_4
ENET1
ENET2
CAN
CAN
UART_x5
UART_X5
UART_x5
GPIO
GPIO
USB2_OC_B
USB1_ID
USB1_OC_B
USB2_PWR
GPIO
BOOT_CFG1_0
BOOT_CFG1_1
BOOT_CFG1_2
BOOT_CFG1_3
BOOT_CFG1_4
BOOT_CFG1_5
BOOT_CFG1_6
BOOT_CFG1_7
BOOT_CFG2_0
BOOT_CFG2_1
BOOT_CFG2_2
BOOT_CFG2_3
BOOT_CFG2_4
BOOT_CFG2_5
BOOT_CFG2_6
BOOT_CFG2_7
BOOT_CFG4_0
S5_SS1_B
S5_SS3_B
GPIO4_01
GPIO4_02
GPIO4_08
GPIO4_09
GPIO4_10
GPIO4_11
GPIO4_14
00000110
BOOT_CFG1
01234567
BOOT_CFG2
00011 0
01234567
11
Boot dev select 01=USDHC Type 0=SD; 1=MMC/eMMC Fast Boot 0=Norm; 1=Fast SD/MMC Speed mode MMC: 00=High speed with fast boot ack SD:00 = Normal speed Bus Width & SD cal MMC: 010=8-bit SDR 110=8-bit DDR SD: 111=4-bit, with 3 delay cells Port select MMC: 11=USDHC4 SD: 01=USDHC2 Boot Frequency 0=792/400MHz USHDC3 Voltage - n/a Use L2 cache as OCRAM SD loopback clk - n/a SD Power Cycle En eMMC Reset Enable 0=Disabled
Boot configuration for development only. Production boot configuration should be programmed
into internal fusebox.
Production designs may have all of these resistors below deleted.
Boot configuration set for eMMC device on USDHC4 with normal boot. Fast boot can be set
once normal boot is operating properly. It is also possible to configure to boot from a micro-SD
card connected on USDHC2.
0
0
Reserved
BC4
U?
A15
C14
B15
B13
C13
D13
A14
B14
E17
C17
D17
A13
E16
D14
C15
E15
T12
W10
Y10
Y11
Y12
W13
Y13
W9
Y9
W12
W11
U11
V12
U13
T14
V14
U14
T11
U10
T13
V11
F11
F10
E14
E13
F12
E12
J15
J18
J16
J19
G16
H19
G17
H17
J20
K20
K19
H20
H16
K17
K15
K16
L15
L19
L16
K18
L20
M15
M16
N17
M18
M19
L18
M20
L17
A10
B10
B12
A12
B11
A11
A9
B9
B7
A7
B8
A8
C11
E10
D10
E11
C12
D11
E9
C10
E8
D7
C9
D8
RGMII1_RD0/GPIO5_IO00
RGMII1_RD1/GPIO5_IO01
RGMII1_RD2/GPIO5_IO02
RGMII1_RD3/GPIO5_IO03
RGMII1_RX_CTL/GPIO5_IO04
RGMII1_RXC/GPIO5_IO05
RGMII1_TD0/GPIO5_IO06
RGMII1_TD1/GPIO5_IO07
RGMII1_TD2/GPIO5_IO08
RGMII1_TD3/GPIO5_IO09
RGMII1_TX_CTL/GPIO5_IO10
RGMII1_TXC/GPIO5_IO11
RGMII2_RD0/GPIO5_IO12
RGMII2_RD1/GPIO5_IO13
RGMII2_RD2/GPIO5_IO14
RGMII2_RD3/GPIO5_IO15
RGMII2_RX_CTL/GPIO5_IO16
RGMII2_RXC/GPIO5_IO17
RGMII2_TD0/GPIO5_IO18
RGMII2_TD1/GPIO5_IO19
RGMII2_TD2/GPIO5_IO20
RGMII2_TD3/GPIO5_IO21
RGMII2_TX_CTL/GPIO5_IO22
RGMII2_TXC/GPIO5_IO23
LCD1_CLK/GPIO3_IO00
LCD1_DATA00/GPIO3_IO01
LCD1_DATA01/GPIO3_IO02
LCD1_DATA02/GPIO3_IO03
LCD1_DATA03/GPIO3_IO04
LCD1_DATA04/GPIO3_IO05
LCD1_DATA05/GPIO3_IO06
LCD1_DATA06/GPIO3_IO07
LCD1_DATA07/GPIO3_IO08
LCD1_DATA08/GPIO3_IO09
LCD1_DATA09/GPIO3_IO10
LCD1_DATA10/GPIO3_IO11
LCD1_DATA11/GPIO3_IO12
LCD1_DATA12/GPIO3_IO13
LCD1_DATA13/GPIO3_IO14
LCD1_DATA14/GPIO3_IO15
LCD1_DATA15/GPIO3_IO16
LCD1_DATA16/GPIO3_IO17
LCD1_DATA17/GPIO3_IO18
LCD1_DATA18/GPIO3_IO19
LCD1_DATA19/GPIO3_IO20
LCD1_DATA20/GPIO3_IO21
LCD1_DATA21/GPIO3_IO22
LCD1_DATA22/GPIO3_IO23
LCD1_DATA23/GPIO3_IO24
LCD1_ENABLE/GPIO3_IO25
LCD1_HSYNC/GPIO3_IO26
LCD1_RESET/GPIO3_IO27
LCD1_VSYNC/GPIO3_IO28
SD2_CLK/GPIO6_IO06
SD2_CMD/GPIO6_IO07
SD2_DATA0/GPIO6_IO08
SD2_DATA1/GPIO6_IO09
SD2_DATA2/GPIO6_IO10
SD2_DATA3/GPIO6_IO11
SD3_CLK/GPIO7_IO00
SD3_CMD/GPIO7_IO01
SD3_DATA0/GPIO7_IO02
SD3_DATA1/GPIO7_IO03
SD3_DATA2/GPIO7_IO04
SD3_DATA3/GPIO7_IO05
SD3_DATA4/GPIO7_IO06
SD3_DATA5/GPIO7_IO07
SD3_DATA6/GPIO7_IO08
SD3_DATA7/GPIO7_IO09
SD4_CLK/GPIO6_IO12
SD4_CMD/GPIO6_IO13
SD4_DATA0/GPIO6_IO14
SD4_DATA1/GPIO6_IO15
SD4_DATA2/GPIO6_IO16
SD4_DATA3/GPIO6_IO17
SD4_DATA4/GPIO6_IO18
SD4_DATA5/GPIO6_IO19
SD4_DATA6/GPIO6_IO20
SD4_DATA7/GPIO6_IO21
SD4_RESET_B/GPIO6_IO22
QSPI1A_DATA0/GPIO4_IO16
QSPI1A_DATA1/GPIO4_IO17
QSPI1A_DATA2/GPIO4_IO18
QSPI1A_DATA3/GPIO4_IO19
QSPI1A_DQS/GPIO4_IO20
QSPI1A_SCLK/GPIO4_IO21
QSPI1A_SS0_B/GPIO4_IO22
QSPI1A_SS1_B/GPIO4_IO23
QSPI1B_DATA0/GPIO4_IO24
QSPI1B_DATA1/GPIO4_IO25
QSPI1B_DATA2/GPIO4_IO26
QSPI1B_DATA3/GPIO4_IO27
QSPI1B_DQS/GPIO4_IO28
QSPI1B_SCLK/GPIO4_IO29
QSPI1B_SS0_B/GPIO4_IO30
QSPI1B_SS1_B/GPIO4_IO31
MIPRCS
3 OF 5
@PRINTORDER=
+3.3V
VDD_EMMC
MCIMX6X2CVN08AC
SDIO_3S2_SS1_B
S2_SS2_B
SDIO_3
GPIO4_12
DEV
RN?
63mW
5%
10K
DEV
RN?
63mW
5%
10K
RN?
63mW
5%
10K
DEV
63mW
5%
10K
DEV
RN?
5%
10K
DEV
63mW
RN?
5%
63mW
RN?
DEV
10K
5%
10K
DEV
RN?
63mW
10K
DEV
RN?
63mW
5%
R?
63mW
1%
10K
R?
63mW
1%
10K
R?
63mW
1%
10K
R?
63mW
1%
10K
R?
63mW
1%
10K
R?
63mW
1%
10K
R?
63mW
1%
4.7K
R?
63mW
1%
4.7K
R?
63mW
1%
4.7K
R?
63mW
1%
4.7K
R?
63mW
1%
4.7K
R?
63mW
1%
4.7K
R?
63mW
1%
4.7K
R?
63mW
1%
4.7K
R?
63mW
1%
4.7K
DNI
DNIDNI
DNI
DNI
DNI
DEV
DEVDEVDEV DEVDEVDEV
DEVDEV