Product Specs

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nRF51802

Multiprotocol Bluetooth® low energy/2.4 GHz RF System on Chip

Product Specification v1.2

Key Features

•2.4 GHz transceiver

• -91 dBm sensitivity in Bluetooth® low energy mode

• 250 kbps, 1 Mbps, 2 Mbps supported data rates

• TX Power -20 to +4 dBm in 4 dB steps

• TX Power -35 dBm Whisper mode

• 13 mA peak RX, 10.5 mA peak TX (0 dBm)

• 10 mA peak RX, 8 mA peak TX (0 dBm) with DC/DC

• RSSI (1 dB resolution)

• ARM® Cortex™-M0 32 bit processor

• 275 μA/MHz running from flash memory

• 150 μA/MHz running from RAM

• Serial Wire Debug (SWD)

• S100 series SoftDevice ready

•Memory

• 256 kB embedded flash program memory

• 16 kB RAM

• On-air compatibility with nRF24L series

• Flexible Power Management

• Supply voltage range 1.8 V to 3.6 V

• 7.7 μs wake-up using 16 MHz RCOSC

• 0.6 μA at 3 V OFF mode

• 1.2 μA at 3 V in OFF mode + 1 region RAM retention

• 3 μA at 3 V ON mode, all blocks IDLE

• 8/9/10 bit ADC - 8 configurable channels

• 31 General Purpose I/O Pins

• One 32 bit and two 16 bit timers with counter mode

•SPI Master/Slave

• Low power comparator

• Temperature sensor

• Two-wire Master (I2C compatible)

•UART (CTS/RTS)

• CPU independent Programmable Peripheral Interconnect (PPI)

• Quadrature Decoder (QDEC)

• AES HW encryption

• Real Timer Counter (RTC)

• Package variants:

• QFN48 package, 6 x 6 mm

• QFN32 package, 5 x 5 mm

Applications

• Computer peripherals and I/O devices

•Mouse

•Keyboard

• Multi-touch trackpad

• Interactive entertainment devices

•Remote control

•Gaming controller

•Beacons

• Personal Area Networks

• Health/fitness sensor and monitor

devices

• Medical devices

• Key-fobs + wrist watches

• Remote control toys

Summary of content (88 pages)

PAGE 1
nRF51802 Multiprotocol Bluetooth® low energy/2.4 GHz RF System on Chip Product Specification v1.2 Key Features • 2.4 GHz transceiver • -91 dBm sensitivity in Bluetooth® low energy mode • 250 kbps, 1 Mbps, 2 Mbps supported data rates • TX Power -20 to +4 dBm in 4 dB steps • TX Power -35 dBm Whisper mode • 13 mA peak RX, 10.
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nRF51802 Product Specification v1.2 Liability disclaimer Nordic Semiconductor ASA reserves the right to make changes without further notice to the product to improve reliability, function or design. Nordic Semiconductor ASA does not assume any liability arising out of the application or use of any product or circuits described herein.
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nRF51802 Product Specification v1.2 Datasheet Status Status Description Objective Product Specification (OPS) This product specification contains target specifications for product development. Preliminary Product Specification (PPS) This product specification contains preliminary data; supplementary data may be published from Nordic Semiconductor ASA later. Product Specification (PS) This product specification contains final product specifications.
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nRF51802 Product Specification v1.2 Date Version Description November 2015 0.7 Updated content: • Section 1.1 “Required reading” on page 7 • Chapter 6 “Absolute maximum ratings” on page 33 • Chapter 7 “Operating conditions” on page 34 • Section 8.1.2 “16 MHz crystal oscillator (16M XOSC)” on page 36 • Section 8.1.4 “16 MHz RC oscillator (16M RCOSC)” on page 38 • Chapter 8.1.5 “32.768 kHz crystal oscillator (32k XOSC)” on page 38 • Section 8.2 “Power management” on page 40 • Section 8.
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nRF51802 Product Specification v1.2 Table of contents 1 1.1 1.2 Introduction............................................................................................................................................... 7 Required reading.............................................................................................................................................. 7 Writing conventions............................................................................................................
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nRF51802 Product Specification v1.2 8.10 8.11 8.12 8.13 8.14 8.15 8.16 8.17 8.18 8.19 8.20 8.21 8.22 8.23 8.24 9 9.1 9.2 I2C compatible Two Wire Interface (TWI) specifications..................................................................54 GPIO Tasks and Events (GPIOTE) specifications...................................................................................55 Analog to Digital Converter (ADC) specifications...............................................................................
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nRF51802 Product Specification v1.2 1 Introduction The nRF51802 is an ultra-low power 2.4 GHz wireless System on Chip (SoC) integrating the nRF51 series 2.4 GHz transceiver, a 32 bit ARM® Cortex™-M0 CPU, flash memory, and analog and digital peripherals. nRF51802 can support Bluetooth® low energy and a range of proprietary 2.4 GHz protocols, such as Gazell from Nordic Semiconductor. Fully qualified Bluetooth low energy stacks for nRF51802 are implemented in the S100 series of SoftDevices.
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nRF51802 Product Specification v1.2 2 Product overview 2.1 Block diagram 5$0 5$0 5$0 VODYH VODYH VODYH 6:&/. 5$0 VODYH Q5) QP *3,2 VODYH 6: '3 6:',2 3 3 ± 3 VODYH VODYH &38 VODYH '$3 VODYH PDVWHU $+% 0XOWL /D\HU $+% 72 $3% %5,'*( ),&5 8,&5 &2'( $50 &257(; 0 19,& Q5(6(7 190& 51* 32:(5 57& > Q@ 7,0(5 > Q@ :'7 7(03 33, (&% ;& ;& ;/ &/2&. PDVWHU (DV\'0$ PDVWHU (DV\'0$ ;/ &&0 $17 5$',2 $3% $17 (DV\'0$ $$5 PDV WHU PDVWHU PDVWHU
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nRF51802 Product Specification v1.2 2.2 Pin assignments and functions This section describes the pin assignment and the pin functions. 2.2.1 Pin assignment QFN48 Figure 2 Pin assignment - QFN48 package Note: VV = Variant code, HP = Build code, YYWWLL = Tracking code. For more information, see Section 10.6 “Code ranges and values” on page 67.
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nRF51802 Product Specification v1.2 2.2.1.1 Pin functions QFN48 Pin Pin name Pin function Description 1 VDD Power Power supply. 2 DCC Power DC/DC output voltage to external LC filter. 3 P0.30 Digital I/O General purpose I/O pin. 4 P0.00 AREF0 Digital I/O Analog input General purpose I/O pin. ADC/LPCOMP reference input 0. 5 P0.01 AIN2 Digital I/O Analog input General purpose I/O pin. ADC/LPCOMP input 2. 6 P0.02 AIN3 Digital I/O Analog input General purpose I/O pin.
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nRF51802 Product Specification v1.2 Pin Pin name Pin function Description P0.21 to P0.25 Digital I/O General purpose I/O pin. 45 P0.26 AIN0 XL2 Digital I/O Analog input Analog output General purpose I/O pin. ADC/LPCOMP input 0. Connection for 32.768 kHz crystal. 46 P0.27 AIN1 XL1 Digital I/O Analog input Analog input General purpose I/O pin. ADC/LPCOMP input 1. Connection for 32.768 kHz crystal or external 32.768 kHz clock reference. P0.28 and P0.29 Digital I/O General purpose I/O pin.
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nRF51802 Product Specification v1.2 2.2.2 Pin assignment QFN32 Figure 3 Pin assignment - QFN32 package Note: VV = Variant code, HP = Build code, YYWWLL = Tracking code. For more information, see Section 10.6 “Code ranges and values” on page 67.
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nRF51802 Product Specification v1.2 2.2.2.1 Pin functions QFN32 Pin Pin name Pin function Description 1 VDD Power Power supply. 2 DCC Power DC/DC output voltage to external LC filter. 3 P0.00 AREF0 Digital I/O Analog input General purpose I/O pin. ADC/LPCOMP reference input 0. 4 P0.02 AIN3 Digital I/O Analog input General purpose I/O pin. ADC/LPCOMP input 3. 5 P0.03 AIN4 Digital I/O Analog input General purpose I/O pin. ADC/LPCOMP input 4. 6 P0.
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nRF51802 Product Specification v1.2 Pin Pin name Pin function Description 28 P0.21 Digital I/O General purpose I/O pin. 29 P0.26 AIN0 XL2 Digital I/O Analog input Analog output General purpose I/O pin. ADC/LPCOMP input 0. Connection for 32.768 kHz crystal. 30 P0.27 AIN1 XL1 Digital I/O Analog input Analog input General purpose I/O pin. ADC/LPCOMP input 1. Connection for 32.768 kHz crystal or external 32.768 kHz clock reference. 31 P0.28 Digital I/O General purpose I/O pin. 32 P0.
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nRF51802 Product Specification v1.2 3 System blocks The chip contains system-level features common to all nRF51 series devices including clock control, power and reset, interrupt system, Programmable Peripheral Interconnect (PPI), watchdog, and GPIO. System blocks which have a register interface and/or interrupt vector assigned are instantiated in the device address space.
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nRF51802 Product Specification v1.2 3.2 Memory All memory and registers are found in the same address space as shown in the Device Memory Map, see Figure 4. Devices in the nRF51 series use flash based memory in the code, FICR, and UICR regions. The RAM region is SRAM.
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nRF51802 Product Specification v1.2 3.2.1 Code organization Chip variant Code size Page size No of pages 256 kB 1024 byte 256 nRF51802-QFAA nRF51802-QCAA Table 3 Code organization 3.2.2 RAM organization RAM is divided into blocks for separate power management which is controlled by the POWER System Block. Each block is divided into two 4 kByte RAM sections with separate RAM AHB slaves. Please see the nRF51 Series Reference Manual for more information.
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nRF51802 Product Specification v1.2 Table 5 shows how memory allocated to different functions can be distributed between RAM sections for parallel access. RAM Blocks/Sections Block0 RAM0 Block1 RAM2 Radio buffers Crypto buffers x x SPIS buffers CPU Stack/Heap CODE Global variables x RAM1 x x RAM3 x x x x x Table 5 16 kB RAM variants 3.
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nRF51802 Product Specification v1.2 3.4 3.4.1 Power management (POWER) Power supply nRF51 supports three different power supply alternatives: • Internal LDO setup • DC/DC converter setup • Low voltage mode setup See Table 18 on page 34 for the voltage range on the different alternatives. See Chapter 11 “Reference circuitry” on page 70 for details on the schematic used for the different power supply alternatives. 3.4.1.
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nRF51802 Product Specification v1.2 3.4.2 Power management The power management system is highly flexible with functional blocks such as the CPU, Radio Transceiver, and peripherals having separate power state control in addition to the global System ON and OFF modes. In System OFF mode, RAM can be retained and the device state can be changed to System ON through Reset, GPIO DETECT signal, or LPCOMP ANADETECT signal.
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nRF51802 Product Specification v1.2 3.4.2.2 System ON mode In system ON mode the system is fully operational and the CPU and selected peripherals can be brought into a state where they are functional and more or less responsive depending on the sub-power mode selected. There are two sub-power modes: • Low power • Constant latency Low Power In Low Power mode the automatic power management system is optimized to save power. This is done by keeping as much as possible of the system powered down.
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nRF51802 Product Specification v1.2 3.5 Programmable Peripheral Interconnect (PPI) The Programmable Peripheral Interconnect (PPI) enables peripherals to interact autonomously with each other using tasks and events independent of the CPU. The PPI allows precise synchronization between peripherals when real-time application constraints exist and eliminates the need for CPU activity to implement behavior which can be predefined using PPI.
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nRF51802 Product Specification v1.2 3.6 Clock management (CLOCK) The advanced clock management system can source the system clocks from a range of internal or external high and low frequency oscillators and distribute them to modules based upon a module’s individual requirements. This prevents large clock trees from being active and drawing power when system modules needing this clock reference are not active.
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nRF51802 Product Specification v1.2 3.6.1 16/32 MHz crystal oscillator The crystal oscillator can be controlled either by a 16 MHz or a 32 MHz external crystal. However, the system clock is always 16 MHz, see the nRF51 Series Reference Manual for more details. The crystal oscillator is designed for use with an AT-cut quartz crystal in parallel resonant mode. To achieve correct oscillation frequency, the load capacitance must match the specification in the crystal data sheet.
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nRF51802 Product Specification v1.2 3.6.2 32.768 kHz crystal oscillator The 32.768 kHz crystal oscillator is designed for use with a quartz crystal in parallel resonant mode. To achieve correct oscillation frequency, the load capacitance must match the specification in the crystal data sheet. Figure 7 shows how the crystal is connected to the 32.768 kHz crystal oscillator. XL1 XL2 C1 C2 32.768 kHz crystal Figure 7 Circuit diagram of the 32.
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nRF51802 Product Specification v1.2 3.6.4 Synthesized 32.768 kHz clock The low frequency clock can be synthesized from the high frequency clock. This saves the cost of a crystal but increases average power consumption as the high frequency clock source will have to be active. 3.7 GPIO The general purpose I/O is organized as one port with up to 31 I/Os (dependent on package) enabling access and control of up to 31 pins through one port.
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nRF51802 Product Specification v1.2 4 Peripheral blocks Peripheral blocks which have a register interface and/or interrupt vector assigned are instantiated, one or more times, in the device address space. The instances, associated ID (for those with interrupt vectors), and base address of features are found in Table 16 on page 32. Detailed functional descriptions, configuration options, and register interfaces can be found in the nRF51 Series Reference Manual. 4.1 2.
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nRF51802 Product Specification v1.2 4.2 Timer/counters (TIMER) The timer/counter runs on the high-frequency clock source (HFCLK) and includes a 4 bit (1/2X) prescaler that can divide the HFCLK. The TIMER will start requesting the 1 MHz mode of the HFCLK for values of the prescaler that gives fTIMER less or equal to 1 MHz. If the timer module is the only one requesting the HFCLK, the system will automatically switch to using the 1 MHz mode resulting in a decrease in the current consumption.
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nRF51802 Product Specification v1.2 4.5 AES CCM Mode Encryption (CCM) Cipher Block Chaining - Message Authentication Code (CCM) Mode is an authenticated encryption algorithm designed to provide both authentication and confidentiality during data transfer. CCM combines counter mode encryption and CBC-MAC authentication.
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nRF51802 Product Specification v1.2 4.9 Temperature sensor (TEMP) The temperature sensor measures die temperature over the temperature range of the device with 0.25° C resolution. 4.10 Serial Peripheral Interface (SPI/SPIS) The SPI interfaces enable full duplex synchronous communication between devices. They support a threewire (SCK, MISO, MOSI) bi-directional bus with fast data transfers.
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nRF51802 Product Specification v1.2 4.12 Universal Asynchronous Receiver/Transmitter (UART) The Universal Asynchronous Receiver/Transmitter offers fast, full-duplex, asynchronous serial communication with built-in flow control (CTS, RTS) support in hardware up to 1 Mbps baud. Parity checking is supported. The GPIOs used for each UART interface line can be chosen from any GPIO on the device and are independently configurable.
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nRF51802 Product Specification v1.2 5 Instance table The peripheral instantiation of the chip is shown in the table below. ID Base address Peripheral Instance Description 0 0x40000000 POWER POWER Power Control. 0 0x40000000 CLOCK CLOCK Clock Control. 0 0x40000000 MPU MPU Memory Protection Unit. 1 0x40001000 RADIO RADIO 2.4 GHz Radio. 2 0x40002000 UART UART0 Universal Asynchronous Receiver/Transmitter. 3 0x40003000 SPI SPI0 SPI Master.
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nRF51802 Product Specification v1.2 6 Absolute maximum ratings Maximum ratings are the extreme limits the chip can be exposed to without causing permanent damage. Exposure to absolute maximum ratings for prolonged periods of time may affect the reliability of the chip. Table 17 specifies the absolute maximum ratings. Symbol Parameter Min. Max. Unit -0.3 +3.9 V DEC2 2 V VSS 0 V -0.3 VDD + 0.
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nRF51802 Product Specification v1.2 7 Operating conditions The operating conditions are the physical parameters that the chip can operate within as defined in Table 18. Symbol Parameter VDD Notes Min. Typ. Max. Units Supply voltage, internal LDO setup 1.8 3.0 3.6 V VDD Supply voltage, DC/DC converter setup 2.1 3.0 3.6 V VDD Supply voltage, low voltage mode setup 1.75 1.8 1.95 V tR_VDD Supply rise time (0 V to VDD) 50 ms TA Operating temperature 85 °C 1,2 3 -40 25 1.
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nRF51802 Product Specification v1.2 8 Electrical specifications This chapter contains electrical specifications for device interfaces and peripherals including radio parameters and current consumption. The test levels referenced are defined in Table 19. Test level Description 1 Simulated, calculated, by design (specification limit) or prototype samples tested at NOC. 2 Parameters have been verified at Test level 1 and in addition: Prototype samples tested at EOC.
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nRF51802 Product Specification v1.2 8.1.2 16 MHz crystal oscillator (16M XOSC) Units Test level MHz N/A ±502 ppm N/A ±402 ppm N/A 100 150 200 Ω Ω Ω N/A N/A N/A 100 μW N/A 4 pF 1 SMD 2520 CL = 8 pF 3503 μA 1 IX16M,1M Run current for the 16 MHz crystal oscillator when used only for a Timer SMD 2520 CL = 8pF at 1 MHz or less. 2503 μA 1 ISTBY,X16M Standby current for 16 MHz crystal oscillator.4 25 μA 1 ISTART,XOSC Startup current for 16 MHz crystal oscillator. 1.
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nRF51802 Product Specification v1.2 8.1.3 32 MHz crystal oscillator (32M XOSC) Min. Typ. Max. Units Test level 32 MHz N/A ±502 ppm N/A ±402 ppm N/A 60 80 100 Ω Ω Ω N/A N/A N/A 100 μW N/A 4 pF 1 SMD 2520 CL = 8 pF 5003 μA 1 SMD 2520 CL = 8 pF 3003 μA 1 Standby current for 32 MHz crystal SMD 2520 CL = 8 pF oscillator.4 30 μA 1 ISTART,XOSC Startup current for 32 MHz crystal oscillator. 1.1 mA 3 tSTART,XOSC Startup time for 32 MHz crystal oscillator.
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nRF51802 Product Specification v1.2 8.1.4 16 MHz RC oscillator (16M RCOSC) Symbol Description Min. Typ. fNOM,RC16M Nominal frequency. 16 fTOL,RC16M Frequency tolerance. ±1 IRC16M Run current for 16 MHz RC oscillator. 7001 IRC16M,1M Run current for 16 MHz RCOSC when used only for a Timer at 1 MHz or less. 5401 tSTART,RC16M Startup time for 16 MHz RC oscillator. 4.2 IRC16M, START Startup current for 16 MHz RC oscillator. 400 Max. ±5 5.
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nRF51802 Product Specification v1.2 8.1.6 32.768 kHz RC oscillator (32k RCOSC) Symbol Description fNOM,RC32k Nominal frequency. fTOL,RC32k Frequency tolerance. fTOL,CAL,RC32k Frequency tolerance. IRC32k Run current. tSTART,RC32k Startup time. Note Min. Units Test level 32.768 kHz N/A ±2 % 3 ±250 ppm 1 1.3 1.5 μA 1 390 487 μs 1 Typ. Calibration interval 4 s 0.5 Max. Table 24 32.768 kHz RC oscillator 8.1.7 32.
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nRF51802 Product Specification v1.2 8.2 Power management Symbol Description Note VPOF Nominal power level warning thresholds (falling supply voltage). Accuracy as defined by VTOL VTOL Threshold voltage tolerance. VHYST Threshold voltage hysteresis. Min. Typ. Max. Units Test level V 2 % 3 mV 3 2.1 2.3 2.5 2.7 ±5 VPOF = 2.1 V VPOF = 2.3 V VPOF = 2.5 V VPOF = 2.
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nRF51802 Product Specification v1.2 Power on reset time (tPOR) is the time from when the supply starts rising to when the device comes out of reset and the CPU starts. The time increases with, and is inclusive of, supply rise time from 0 V to VDD. Table 28 gives tPOR for a number of supply rise times, simulated with a linear ramp from 0 V to VDD, over the supply voltage range 1.8 V to 3.6 V. Note Units Test level 20 ms 1 4.1 21 ms 1 10 13 30 ms 1 38 52 68 ms 1 Symbol Description Min.
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nRF51802 Product Specification v1.2 Units Test level 0.61 μA 2 Additional current in SYSTEM OFF per retained RAM block (8 kB) 0.61 μA 2 IOFF2ON OFF to CPU execute transition current. 400 μA 1 tOFF2ON OFF to CPU execute. 13.1 μs 1 ION,16k SYSTEM-ON base current with 16 kB RAM enabled. 31 μA 2 t1V2 Startup time for 1V2 regulator. 2.3 μs 1 I1V2XO16 Current drawn by 1V2 regulator and 16 MHz XOSC when both are on at the same time. See Table 31 on page 44.
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nRF51802 Product Specification v1.2 Symbol Description t1V7 Startup time for 1V7 regulator I1V7 Current drawn by 1V7 regulator FDCDC DC/DC converter current conversion factor. 1. 2. 3. 4. Note Min. Typ. Max. 2 3.6 275 0.654 Units Test level μs 1 μA 2 1.24 Add 1 μA to the current value if the device is used in Low voltage mode. This number includes the current used by the automated power and clock management system. For details on 1 MHz mode, see Section 4.
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nRF51802 Product Specification v1.2 8.3 Block resource requirements Resource requirements Block ID 1V2 HFCLK1 Comment LFCLK 1V7 Radio 1 x x Requires HFCLK XOSC. UART 2 x x When receiver or transmitter are STARTed. SPIS 4 x x Requested when CSN asserts. SPI 3, 4 x x TWI 3, 4 x x GPIOTE 6 x x Only in input mode. ADC 7 x x Requires HFCLK XOSC. x Requires 1V2 when a TIMER EVENT is triggered.
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nRF51802 Product Specification v1.2 8.5 Radio transceiver 8.5.1 General radio characteristics Max. Units Test level 2483 MHz N/A 1 MHz N/A Frequency deviation at 250 kbps. ±170 kHz 2 Δf1M Frequency deviation at 1 Mbps. ±170 kHz 2 Δf2M Frequency deviation at 2 Mbps. ±320 kHz 2 ΔfBLE Frequency deviation at BLE. ±275 kHz 4 bpsFSK On-air data rate. 2000 kbps N/A Max. Units Test level Symbol Description Note Min. fOP Operating frequencies. 1 MHz channel spacing.
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nRF51802 Product Specification v1.2 8.5.3 Radio current consumption with DC/DC enabled Units Test level 11.8 mA 2 1 8.0 mA 2 TX only run current at POUT = -4 dBm. 1 6.3 mA 2 ITX,-8dBm TX only run current at POUT = -8 dBm. 1 5.6 mA 2 ITX,-12dBm TX only run current at POUT = -12 dBm. 1 5.3 mA 2 ITX,-16dBm TX only run current at POUT = -16 dBm. 1 5.0 mA 2 ITX,-20dBm TX only run current at POUT = -20 dBm. 1 4.7 mA 2 ITX,-30dBm TX only run current at POUT = -30 dBm.
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nRF51802 Product Specification v1.2 8.5.4 Transmitter specifications Min. Units Test level 4 dBm 4 24 dB 2 dB 1 dBm 2 2000 kHz 2 950 1200 kHz 2 700 800 kHz 2 Symbol Description PRF Maximum output power. PRFC RF power control range. PRFCR RF power accuracy. PWHISP RF power whisper mode. PBW2 20 dB bandwidth for modulated carrier (2 Mbps). 1800 PBW1 20 dB bandwidth for modulated carrier (1 Mbps). PBW250 20 dB bandwidth for modulated carrier (250 kbps). 20 Typ. Max.
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nRF51802 Product Specification v1.2 8.5.5 Symbol Receiver specifications Description Min. Units Test level 0 dBm 1 Typ. Max. Receiver operation PRXMAX Maximum received signal strength at < 0.1% PER. PRXSENS,2M Sensitivity (0.1% BER) at 2 Mbps. -83 dBm 2 PRXSENS,1M Sensitivity (0.1% BER) at 1 Mbps. -88 dBm 2 PRXSENS,250k Sensitivity (0.1% BER) at 250 kbps. -94 dBm 2 PSENS IT 1 Mbps BLE Receiver sensitivity: Ideal transmitter.
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nRF51802 Product Specification v1.2 Symbol Description Min. Units Test level 4 dB 2 Typ. Max. 250 kbps C/ICO C/I co-channel. C/I1ST 1st ACS, C/I 1 MHz. -10 dB 2 C/I2ND 2nd ACS, C/I 2 MHz. -33 dB 2 C/I3RD 3rd ACS, C/I 3 MHz. -37 dB 2 th C/I6th 6 ACS, C/I fi > 6 MHz. -50 dB 2 C/I12th 12th ACS, C/I 12 MHz. -55 dB 2 C/INth Nth ACS, C/I fi > 25 MHz. -58 dB 2 Bluetooth Low Energy RX selectivity C/ICO C/I co-channel. 12 dB 2 C/I1ST 1st ACS, C/I 1 MHz.
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nRF51802 Product Specification v1.2 8.5.6 Radio timing parameters Symbol Description 250 k 1M 2M BLE Jitter Units tTXEN Time between TXEN task and READY event. 132 132 132 140 0 μs tTXDISABLE Time between DISABLE task and DISABLED event when the radio was in TX. 10 4 3 4 1 μs tRXEN Time between the RXEN task and READY event. 130 130 130 138 0 μs tRXDISABLE Time between DISABLE task and DISABLED event when the radio was in RX. 0 0 0 0 1 μs tTXCHAIN TX chain delay.
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nRF51802 Product Specification v1.2 8.7 Universal Asynchronous Receiver/Transmitter (UART) specifications Units Test level 230 μA 1 Run current at 115200 bps. 220 μA 1 IUART1k2 Run current at 1200 bps. 210 μA 1 fUART Baud rate for UART. kbps N/A tCTSH CTS high time. μs 1 Symbol Description IUART1M Run current at max baud rate. IUART115k Note Min. 1.2 1 Table 41 UART specifications Page 51 Typ. Max.
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nRF51802 Product Specification v1.2 8.8 Serial Peripheral Interface Slave (SPIS) specifications Symbol Description Min. ISPIS125K Run current for SPI slave at 125 kbps.1 ISPIS2M Run current for SPI slave at 2 Mbps.1 fSPIS Bit rates for SPIS. Units Test level 180 μA 1 183 μA 1 Mbps N/A Typ. Max. 42 0.125 1. CSN asserted. 2. This bit rate is only possible if the instructions are followed in Section 4.10.1 “Enable 4 Mbps SPIS bit rate” on page 30.
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nRF51802 Product Specification v1.2 8.9 Serial Peripheral Interface (SPI) Master specifications Symbol Description Min. ISPI125K Run current for SPI master at 125 kbps. ISPI4M Run current for SPI master at 4 Mbps. fSPI Bit rates for SPI. Units Test level 180 μA 1 200 μA 1 Mbps N/A Units Test level Typ. 0.125 Max.
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nRF51802 Product Specification v1.2 8.10 I2C compatible Two Wire Interface (TWI) specifications Symbol Description Note I2W100K Run current for TWI at 100 kbps. I2W400K Run current for TWI at 400 kbps. f2W Bit rates for TWI. tTWI,START Time from STARTRX/STARTTX task is given until start condition. Min. Units Test level 380 μA 1 400 μA 1 kbps N/A μs 1 Typ. Max. 100 Low power mode.1 Constant latency mode.1 400 3 1 4.4 1.
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nRF51802 Product Specification v1.2 8.11 GPIO Tasks and Events (GPIOTE) specifications Units Test level 22 μA 1 Run current with 1 or more GPIOTE active channels in Output mode. 0.1 μA 1 Run current when all channels in Idle mode. PORT event can be generated with a delay of up to t1V2. 0.1 μA 1 Symbol Description Min. IGPIOTE,IN Run current with 1 or more GPIOTE active channels in Input mode. IGPIOTE,OUT IGPIOTE,IDLE Typ. Max.
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nRF51802 Product Specification v1.2 8.12 Analog to Digital Converter (ADC) specifications Note: HFCLK XOSC is required to get the stated ADC accuracy. Symbol Description Note DNL10b Differential non-linearity (10 bit mode). INL10b Integral non-linearity (10 bit mode). VOS Offset error. eG Gain error. VREF_VBG Internal Band Gap reference voltage (VBG). VREF_VBG_ERR Internal Band Gap reference voltage error. -1.5 TCREF_VBG_DRIFT Internal Band Gap reference voltage drift.
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nRF51802 Product Specification v1.2 8.13 Timer (TIMER) specifications Symbol Description Note ITIMER0/1/2 Timer current when running from HFCLK in 16 MHz mode. ITIMER0/1/2,1M Timer current when running from HFCLK in 1 MHz mode. tTIMER,START Time from START task is given until timer starts counting. Min. Units Test level 30 μA 1 4 μA 1 0.25 μs 1 Units Test level μA 1 Units Test level Typ. Max. Table 50 Timer specifications 8.
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nRF51802 Product Specification v1.2 8.16 Random Number Generator (RNG) specifications Symbol Description IRNG Run current at 16 MHz. tRNG,RAW Run time per byte in RAW mode. Run time per byte in Uniform mode. tRNG,UNI Units Test level 60 μA 1 Uniform distribution of 0 and 1 is not guaranteed. 167 μs 1 Uniform distribution of 0 and 1 is guaranteed. Time to generate a byte cannot be guaranteed. 677 μs 1 Note Min. Typ. Max. Table 53 Random Number Generator (RNG) specifications 8.
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nRF51802 Product Specification v1.2 8.20 Watchdog Timer (WDT) specifications Symbol Description Min. IWDT Run current for watchdog timer. tWDT Time out interval, watchdog timer. Typ. Max. 0.1 30 μs Units Test level μA 1 36 hrs 1 Table 57 Watchdog Timer specifications 8.21 Symbol Quadrature Decoder (QDEC) specifications Description Note Min. IQDEC Typ. Max. 12 tSAMPLE Time between sampling signals from quadrature decoder. tLED Time from LED is turned on to signals are sampled.
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nRF51802 Product Specification v1.2 8.22 Non-Volatile Memory Controller (NVMC) specifications Flash write is done by executing a program that writes one word (32 bit) consecutively after the other to the flash memory. The program doing the flash writes could be set up to run from flash or from RAM. The timing of one flash write operation depends on whether the next instructions following the flash write will be fetched from flash or from RAM.
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nRF51802 Product Specification v1.2 8.23 General Purpose I/O (GPIO) specifications Symbol Parameter (condition) VIH Input high voltage. VIL Input low voltage. VOH Output high voltage (std. drive, 0.5 mA). VOH Output high voltage (high-drive, 5 mA). VOL Note Max. Units 0.7 VDD VDD V VSS 0.3 VDD V VDD-0.3 VDD V VDD-0.3 VDD V Output low voltage (std. drive, 0.5 mA). VSS 0.3 V VOL Output low voltage (high-drive, 5 mA). VSS 0.3 V RPU Pull-up resistance.
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nRF51802 Product Specification v1.2 9 Mechanical specifications 9.1 QFN48 package Figure 14 QFN48 6 x 6 mm package Package QFN48 (6 x 6) A A1 A3 b D, E D2, E2 e 0.80 0.85 0.90 0.00 0.02 0.05 0.20 0.15 0.20 0.25 6.00 4.50 4.60 4.70 0.40 Table 62 QFN48 dimensions in millimeters Page 62 K L 0.20 0.35 0.40 0.45 Min. Nom. Max.
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nRF51802 Product Specification v1.2 9.2 QFN32 package Figure 15 QFN32 5 x 5 mm package Package QFN32 (5 x 5) A A1 A3 b D, E D2, E2 e 0.80 0.85 0.90 0.00 0.02 0.05 0.20 0.18 0.25 0.30 5.00 3.50 3.60 3.70 0.50 Table 63 QFN32 dimensions in millimeters Page 63 K L 0.20 0.35 0.40 0.45 Min. Nom. Max.
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nRF51802 Product Specification v1.2 10 Ordering information 10.1 Chip marking N 5 1 8 0 2

Table 64 Package marking 10.
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nRF51802 Product Specification v1.2 10.3 Outer box label FROM: TO: DEVICE: NRFxxxxx--
S/O No.: CUSTOMER PO No.: WF LOT No.: Trace Code: QTY: PACKAGE COUNT: PACKAGE WEIGHT: of KGS COUNTRY OF ORIGIN: Figure 17 Outer box label 10.
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nRF51802 Product Specification v1.2 10.5 Abbreviations Abbreviation N51/nRF51 802 Definition and Implemented Codes nRF51 series product Part code Package code Variant code
Build code H - Hardware version code P - Production configuration code (production site, etc.
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nRF51802 Product Specification v1.2 10.6 Code ranges and values Package Size (mm) Pin/Ball Count Pitch (mm) QF QFN 6x6 48 0.4 QC QFN 5x5 32 0.5 Table 67 Package codes Flash (kB) RAM (kB) DC/DC Bond-out AA 256 16 YES Table 68 Variant codes Description [A. .Z] Hardware version/revision identifier (incremental) Table 69 Hardware version codes
Description [0. .9] Production device identifier (incremental) [A. .
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nRF51802 Product Specification v1.2 [AA. .
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nRF51802 Product Specification v1.2 10.7 10.7.1 Product options nRF ICs MOQ1 Order code nRF51802-QFAA-R7 1000 nRF51802-QCAA-R7 1500 nRF51802-QFAA-R 3000 nRF51802-QCAA-R 4000 nRF51802-QFAA-T nRF51802-QCAA-T 490 1. Minimum Order Quantity. Table 76 Order code 10.7.2 Development tools Order code Description nRF51-DK1 nRF51 Bluetooth Smart/ANT/2.4 GHz RF Development Kit nRF51-Dongle1 nRF51 USB dongle for emulator, sniffer, firmware development 1.
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nRF51802 Product Specification v1.2 11 Reference circuitry For the following reference layouts, C_pcb1 and C_pcb2, between X1 and XC1/XC2, is estimated to 0.5 pF each. The exposed center pad of the QFN package must be connected to supply ground for proper device operation. 11.1 PCB guidelines A well designed PCB is necessary to achieve good RF performance. A poor layout can lead to loss in performance or functionality.
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nRF51802 Product Specification v1.2 11.1.1 PCB layout example The PCB layout shown in Figure 18 is a reference layout for the QFN48 package with internal LDO setup. For all available reference layouts, see the Reference Layout section in our Infocenter.
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nRF51802 Product Specification v1.2 11.2 Reference design schematics The following sections covers the reference design schematics for all chip variants of the nRF51802. Table 78 lists the cross references to the package sections describing each package variant. For package See section: QFAA Section 11.3 “QFAA QFN48 package” on page 73 QCAA Section 11.
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nRF51802 Product Specification v1.2 11.3 QFAA QFN48 package Documentation for the QFAA QFN48 package reference circuit, including Altium Designer files, PCB layout files, and PCB production files can be downloaded from the Reference Layout section in our Infocenter. 11.3.1 QFAA QFN48 schematic with internal LDO setup Optional C13 C1 12pF C14 12pF X2 32.768kHz C2 12pF X1 16MHz 12pF P0.29 P0.28 XL1 XL2 P0.25 P0.24 P0.23 P0.22 P0.
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nRF51802 Product Specification v1.2 11.3.1.1 Bill of Materials Designator Value Description C1, C2, C13, C14 12 pF Capacitor, NP0, ±2% 0402 C3 2.2 nF Capacitor, X7R, ±10% 0402 C4 0.8 pF Capacitor, NP0, ±5% 0402 C5 2.2 pF Capacitor, NP0, ±0.1 pF 0402 C6 1.5 pF Capacitor, NP0, ±0.1 pF 0402 C7, C8, C11 100 nF Capacitor, X7R, ±10% 0402 C9 1.0 nF Capacitor, X7R, ±10% 0402 C10 47 nF Capacitor, X7R, ±10% 0402 L1 5.
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nRF51802 Product Specification v1.2 11.3.2 QFAA QFN48 schematic with low voltage mode setup Optional C13 C1 12pF C14 12pF X2 32.768kHz C2 12pF X1 16MHz 12pF P0.29 P0.28 XL1 XL2 P0.25 P0.24 P0.23 P0.22 P0.21 C8 100nF 48 47 46 45 44 43 42 41 40 39 38 37 VCC_1V8 C7 100nF VCC_1V8 C11 C9 1.0nF P0.29 P0.28 P0.27 P0.26 P0.25 P0.24 P0.23 P0.22 P0.21 DEC1 XC2 XC1 1 2 3 4 5 6 7 8 9 10 11 12 VDD DCC P0.30 P0.00 P0.01 P0.02 P0.03 P0.04 P0.05 P0.06 P0.
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nRF51802 Product Specification v1.2 11.3.2.1 Bill of Materials Designator Value Description C1, C2, C13, C14 12 pF Capacitor, NP0, ±2% 0402 C3 2.2 nF Capacitor, X7R, ±10% 0402 C4 0.8 pF Capacitor, NP0, ±5% 0402 C5 2.2 pF Capacitor, NP0, ±0.1 pF 0402 C6 1.5 pF Capacitor, NP0, ±0.1 pF 0402 C7, C8, C11 100 nF Capacitor, X7R, ±10% 0402 C9 1.0 nF Capacitor, X7R, ±10% 0402 C10 47 nF Capacitor, X7R, ±10% 0402 L1 5.
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nRF51802 Product Specification v1.2 11.3.3 QFAA QFN48 schematic with DC/DC converter setup Optional C13 C1 12pF C14 12pF X2 32.768kHz C2 12pF X1 16MHz 12pF P0.29 P0.28 XL1 XL2 P0.25 P0.24 P0.23 P0.22 P0.21 C8 100nF 48 47 46 45 44 43 42 41 40 39 38 37 AVDD L5 15nH C12 1.0μF L4 10μH P0.30 P0.00 C7 P0.01 4.7μF P0.02 P0.03 P0.04 P0.05 P0.06 VCC_nRF P0.07 C11 C9 1.0nF P0.29 P0.28 P0.27 P0.26 P0.25 P0.24 P0.23 P0.22 P0.21 DEC1 XC2 XC1 VDD DCC P0.30 P0.00 P0.01 P0.02 P0.03 P0.04 P0.05 P0.
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nRF51802 Product Specification v1.2 11.3.3.1 Bill of Materials Designator Value Description Footprint C1, C2, C13, C14 12 pF Capacitor, NP0, ±2% 0402 C3 2.2 nF Capacitor, X7R, ±10% 0402 C4 0.8 pF Capacitor, NP0, ±5% 0402 C5 2.2 pF Capacitor, NP0, ±0.1 pF 0402 C6 1.5 pF Capacitor, NP0, ±0.1 pF 0402 C7 4.7 μF Capacitor, X5R, ±10% 0603 C8, C11 100 nF Capacitor, X7R, ±10% 0402 C9 1.0 nF Capacitor, X7R, ±10% 0402 C10 47 nF Capacitor, X7R, ±10% 0402 C12 1.
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nRF51802 Product Specification v1.2 11.4 QCAA QFN32 package Documentation for the QCAA QFN32 package reference circuit, including Altium Designer files, PCB layout files, and PCB production files can be downloaded from the Reference Layout section in our Infocenter. 11.4.1 QCAA QFN32 schematic with internal LDO setup Optional C13 C1 12pF C14 12pF X2 32.768kHz C2 12pF C8 100nF P0.29 P0.28 XL1 XL2 P0.21 12pF X1 16MHz 32 31 30 29 28 27 26 25 VCC_nRF 100nF VCC_nRF C11 P0.29 P0.28 P0.27 P0.
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nRF51802 Product Specification v1.2 11.4.1.1 Bill of Materials Designator Value Description C1, C2, C13, C14 12 pF Capacitor, NP0, ±2% 0402 C3 2.2 nF Capacitor, X7R, ±10% 0402 C4 1.0 pF Capacitor, NP0, ±0.1 pF 0402 C5 3.9 pF Capacitor, NP0, ±0.1 pF 0402 C6 1.5 pF Capacitor, NP0, ±0.1 pF 0402 C7, C8, C11 100 nF Capacitor, X7R, ±10% 0402 C9 1.0 nF Capacitor, X7R, ±10% 0402 C10 47 nF Capacitor, X7R, ±10% 0402 L1 5.
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nRF51802 Product Specification v1.2 11.4.2 QCAA QFN32 schematic with low voltage mode setup Optional C13 C1 12pF C14 12pF X2 32.768kHz C2 12pF C8 100nF P0.29 P0.28 XL1 XL2 P0.21 12pF X1 16MHz 32 31 30 29 28 27 26 25 VCC_1V8 100nF VCC_1V8 C11 P0.29 P0.28 P0.27 P0.26 P0.21 DEC1 XC2 XC1 C9 1.0nF VDD DCC P0.00 P0.02 P0.03 P0.04 P0.06 VDD nRF51802 AVDD VSS VSS ANT2 ANT1 VDD_PA DEC2 P0.17 24 23 22 21 20 19 18 17 C5 L1 5.6nH 2.7nH C4 1.0pF L2 10nH P0.17 VCC_1V8 U1 nRF51802-QCAA 3.
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nRF51802 Product Specification v1.2 11.4.2.1 Bill of Materials Designator Value Description C1, C2, C13, C14 12 pF Capacitor, NP0, ±2% 0402 C3 2.2 nF Capacitor, X7R, ±10% 0402 C4 1.0 pF Capacitor, NP0, ±0.1 pF 0402 C5 3.9 pF Capacitor, NP0, ±0.1 pF 0402 C6 1.5 pF Capacitor, NP0, ±0.1 pF 0402 C7, C8, C11 100 nF Capacitor, X7R, ±10% 0402 C9 1.0 nF Capacitor, X7R, ±10% 0402 C10 47 nF Capacitor, X7R, ±10% 0402 L1 5.
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nRF51802 Product Specification v1.2 11.4.3 QCAA QFN32 schematic with DC/DC converter setup Optional C13 C1 12pF C14 12pF X2 32.768kHz C2 12pF C8 100nF P0.29 P0.28 XL1 XL2 P0.21 12pF X1 16MHz 32 31 30 29 28 27 26 25 AVDD 15nH C12 1.0μF L4 P0.00 P0.02 C7 P0.03 4.7μF P0.04 P0.06 10μH VCC_nRF C11 P0.29 P0.28 P0.27 P0.26 P0.21 DEC1 XC2 XC1 VDD DCC P0.00 P0.02 P0.03 P0.04 P0.06 VDD nRF51802 AVDD VSS VSS ANT2 ANT1 VDD_PA DEC2 P0.17 24 23 22 21 20 19 18 17 C5 L1 5.6nH 2.7nH C4 1.
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nRF51802 Product Specification v1.2 11.4.3.1 Bill of Materials Designator Value Description Footprint C1, C2, C13, C14 12 pF Capacitor, NP0, ±2% 0402 C3 2.2 nF Capacitor, X7R, ±10% 0402 C4 1.0 pF Capacitor, NP0, ±0.1 pF 0402 C5 3.9 pF Capacitor, NP0, ±0.1 pF 0402 C6 1.5 pF Capacitor, NP0, ±0.1 pF 0402 C7 4.7 μF Capacitor, X5R, ±10% 0603 C8, C11 100 nF Capacitor, X7R, ±10% 0402 C9 1.0 nF Capacitor, X7R, ±10% 0402 C10 47 nF Capacitor, X7R, ±10% 0402 C12 1.
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nRF51802 Product Specification v1.
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(OEM) Integrator has to assure compliance of the entire end-product incl. the integrated RF Module. For 15 B (§15.107 and if applicable §15.107) compliance, the host manufacturer is required to show compliance with 15 while the module is installed and operating. Furthermore the module should be transmitting and the evaluation should confirm that the module's intentional emissions (15C) are compliant (fundamental / out-of-band). Finally the integrator has to apply the appropriate equipment authorization (e.
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Module statement The single-modular transmitter is a self-contained, physically delineated, component for which compliance can be demonstrated independent of the host operating conditions, and which complies with all eight requirements of § 15.212(a)(1) as summarized below. 1) The radio elements have the radio frequency circuitry shielded. 2) The module has buffered modulation/data inputs to ensure that the device will comply with Part 15 requirements with any type of input signal.
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Integration instructions for host product manufacturers according to KDB 996369 D03 OEM Manual v01 2.2 List of applicable FCC rules FCC Part 15.247 2.3 Specific operational use conditions This transmitter/module and its antenna(s) must not be co-located or operating in conjunction with any transmitter. This information also extends to the host manufacturer’s instruction manual. 2.4 Limited module procedures not applicable 2.5 Trace antenna designs not applicable 2.