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Appendix B—System Management Mode (SMM) overview
System Management Mode (SMM) is an industry-standard approach used for PC advanced power-management features
and other OS-independent functions while the OS is running. While the SMM term and implementation is specic to x86
architectures, many modern computing architectures use a similar architectural concept.
SMM is congured by the BIOS at boot time. The SMM code is populated into the main (DRAM) memory. Then BIOS uses
special (lockable) conguration registers within the chipset to block access to this area when the microprocessor is not
executing in an SMM context. At runtime, entry into SMM mode is event-driven. The chipset is programmed to recognize
many types of events and timeouts. When such an event occurs, the chipset hardware asserts the System Management
Interrupt (SMI) input pin. At the next instruction boundary, the microprocessor saves its entire state and enters SMM.
As the microprocessor enters SMM, it asserts a hardware output pin, SMI Active (SMIACT). This pin serves notice to the
chipset hardware that the microprocessor is entering SMM. An SMI can be asserted at any time, during any process
operating mode, except from within SMM itself. The chipset hardware recognizes the SMIACT signal and redirects all
subsequent memory cycles to a protected area of memory (sometimes referred to as the SMRAM area), reserved
specically for SMM. Immediately after receiving the SMI input and asserting the SMIACT output, the microprocessor
begins to save its entire internal state to this protected memory area.
After the microprocessor state has been stored to SMRAM memory, the special SMM handler code that also resides in
SMRAM (placed there by system BIOS at boot time) begins to execute in a special SMM operation mode. While operating
in this mode, most hardware and memory isolation mechanisms are suspended, and the microprocessor can access
virtually all resources in the platform to enable it to perform required tasks. The SMM code completes the required task,
and then it’s time to return the microprocessor to the previous operating mode. At that point, the SMM code executes the
Return from System Management Mode (RSM) instruction to exit SMM. The RSM instruction causes the microprocessor
to restore its previous internal state data from the copy saved in SMRAM upon SMM entry. Upon completion of RSM, the
entire microprocessor state has been restored to the state just prior to the SMI event, and the previous program (OS,
applications, hypervisor, etc.) resumes execution right where it left o.
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