DDR3 memory technology

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Intel 4P architecture and DDR3
Figure 7 shows the processor and memory architecture for the 4P HP ProLiant G7 servers that use Intel
Xeon 5600 series processors. While the basic NUMA architecture is evident, there are distinct
differences between this and the design of 2P systems. The most significant difference for the 4P
server is the existence of separate memory buffers between the CPU and the memory channels. These
buffers use a proprietary, high-speed serial link to transport memory data between themselves and the
CPU while providing a standard memory bus interface to the DDR3 DIMMs. Using this approach,
each memory controller supports two memory channels of two DIMMs each. In addition, the 4P
architecture uses four memory controllers per CPU rather than three. Taken together, these design
choices allow the Intel-based 4P systems to support up to 64 DIMMs, or 2 Terabytes of memory using
32 GB DIMMs.
Figure 7: 4P memory architecture for Intel-based HP ProLiant G7 servers
HP ProLiant G7
Intel 4-way architecture
CPU
Memory
Buffer
Memory
Buffer
Memory
Buffer
Memory
Buffer
CPU
Memory
Buffer
Memory
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Memory
Buffer
Memory
Buffer
CPU
Memory
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CPU
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IO Hub IO Hub
QPI Links
With the memory buffering used in this architecture, the system memory operates at 1066 MT/s for
all memory configurations, including fully populated systems.
For ProLiant Gen8 servers, this architecture will remain relatively unchanged, although the memory
speed will probably increase to 1333 MT/s.
AMD 4P architecture and DDR3
AMD-based HP ProLiant servers have used NUMA architecture since their inception. The ProLiant G7
servers are the first generation to use DDR3 memory. Figure 8 shows processor and memory
architecture for an AMD-based 4P ProLiant G7 server with three DIMM sockets per memory channel.