Solid state drive technology for ProLiant servers

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controller and its SAS or SATA channels. An I/O Accelerator is its own controller and storage device,
requiring its own specialized driver and delivering block I/O directly across the PCIe bus. As we will
see, this gives it some distinct performance advantages for use in particular application environments.
I/O accelerator architecture
I/O accelerators use the same basic NAND memory and NAND memory controller technology as
SSDs to perform the low-level storage and retrieval of data to and from flash memory. After that, the
similarities end.
As we showed in Figure 2, each SSD uses an onboard processor to perform the translation between
the NAND read/write interface and the storage block interface that it presents to a Smart Array host
controller. Block data moves across a 3 Gb/s or 6 Gb/s link to the controller before being delivered
across the PCIe bus to the calling application.
An I/O accelerator, on the other hand, is its own controller and storage device. It is a PCIe card
requiring a device driver. With I/O accelerators, all of the logic that translates standard block level
I/O into NAND reads and writes is contained in the accelerator’s device driver. The same is true for
the NAND management functions, including wear leveling, error correction and bad block
management. This architecture allows the I/O accelerator to leverage the server CPUs much greater
bandwidth and multi-core processing capabilities to achieve significant improvements in block storage
throughput and lower latencies than are possible with onboard processors.
Figure 3. HP IO Accelerator architecture
I/O accelerators also use a wider and flatter array of NAND cells than SSDs. The HP PCIe IO
Accelerator uses 8 to 12 NAND channels in its NAND array compared to 4 NAND channels in a
typical SSD. This architecture allows our IO Accelerator to perform more NAND accesses in parallel,
leading to further performance improvements over typical SSDs.
Finally, the architecture of the HP PCIe IO Accelerator ensures maximum performance by removing
intermediaries that could cause bottlenecks between the solid state memory and the PCIe bus. With no