Quadrics QsNetII Interconnect
• Polls the environmental sensors, determining fan speeds, PSU status, and
component temperature.
• Verifies and tests all the internal midplane connections between all installed
and detected switch cards.
• Verifies that the internal links between the detected cards are connected and
fully operational.
• Provides and option to review and reprint the results of either of its switch or
midplane test stages.
Typical output from the
selftest option is shown in the following example:
Example 12-1: Output from the selftest Option
PASSED 1
Press return to run midplane test 2
WARNING: terminal is not fully functional 3
Self Test: Checking for I2C / JTAG bus control 4
Testing Link 00, 03 --> 04, 0 QM501(07, 04) --> QM502(00, 00) B0 P03
5
Testing Link 00, 07 --> 04, 04 QM501(06, 04) --> QM502(01,00) B0 P07
Testing Link 00, 11 --> 04, 08 QM501(05, 04) --> QM502(02, 00) B0 P11
Testing Link 00, 15 --> 04, 12 QM501(04, 04) --> QM502(03, 00) B0 P15
Testing Link 01, 03 --> 04, 01 QM501(07, 04) --> QM502(00, 01) B1 P03
Testing Link 01, 07 --> 04, 05 QM501(06, 04) --> QM502(01, 01) B1 P07
Testing Link 01, 11 --> 04, 09 QM501(05, 04) --> QM502(02, 01) B1 P11
Testing Link 01, 15 --> 04, 13 QM501(04, 04) --> QM502(03, 01) B1 P15
Testing Link 02, 03 --> 04, 02 QM501(07, 04) --> QM502(00, 02) B2 P03
Testing Link 02, 07 --> 04, 06 QM501(06, 04) --> QM502(01, 02) B2 P07
Testing Link 02, 11 --> 04, 10 QM501(05, 04) --> QM502(02, 02) B2 P11
Testing Link 02, 15 --> 04, 14 QM501(04, 04) --> QM502(03, 02) B2 P15
Testing Link 03, 03 --> 04, 03 QM501(07, 04) --> QM502(00, 03) B3 P03
Testing Link 03, 07 --> 04, 07 QM501(06, 04) --> QM502(01, 03) B3 P07
Testing Link 03, 11 --> 04, 1 QM501(05, 04) --> QM502(02, 03) B3 P11
Testing Link 03, 15 --> 04, 15 QM501(04, 04) --> QM502(03, 03) B3 P15
Self Test: PASSED 0 broken midplane links out of 16 tested 6
--------------------
Selftest Report
--------------------
Test Status
--------------------
Switch Test PASSED
Midplane Test PASSED 7
--------------------
1 Tests 1 through 5 are complete at this line.
2 This point marks the start of testing the internal midplane connections between installed and detected cards.
3 You can ignore this message
4 Test 6, the I2C and JTAG interface test, starts at this line.
5 This line marks the start of link testing. Data for each link is displayed in the report.
6 This line marks the end of link testing. Internal links between the detected cards are connected and fully
operational.
7 The test is confirmed as PASSED, with no errors detected.
If the output from selftest contains any error messages, use the following
procedures to interpret and correct the problems.
ERROR can read lm75 on empty slot, suspected JTAG failure on board X
• Location: On all boards.
- Possible Diagnoses: JTAG failure on the active QM503.
Correction: Replace the QM503 and re-test.
- Possible Diagnoses: Midplane fault associated with JTAG bus.
Correction: Replace the Midplane and re-test.
• Location: Not on all boards.
12-2 Maintenance and Diagnostic Procedures