Quadrics QsNetII Interconnect

1
Overview of Quadrics-Based Clusters
A cluster is a set of independent computers combined into a unified system through
system software and networking technologies. An overview of the generic HP
Cluster Platform architecture is provided in the
Cluster Platform Overview. This
chapter contains the following information that is specific to clusters incorporating
the Quadrics interconnect:
• A description of components and terminology specific to HP Cluster Platforms
using the Quadrics interconnect, (see Section 1.1).
• An overview of the cluster installation procedure, (see Section 1.2).
• Cabling guidelines and cable descriptions, (See Section 1.3).
• The procedure for cabling and powering up the cluster components, (see
Section 1.4)
1.1 Cluster Components and Terminology
The Core Components Guide describes components that are generic to all HP
Cluster Platform models, and defines the terminology used to describe those
components. Table 1-1 lists the components (and associated terminology) that are
specific to clusters that use the Quadrics interconnect.
Table 1-1: Terminology
Cluster Terminology Component
bounded Clusters with 128 nodes or fewer require only a single interconnect
to provide all links in the network topology. See also federated.
chassis (interconnect
chassis)
The basic unit of the interconnect, otherwise known as its
enclosure. The Quadrics QsNet
II
™ high-speed interconnect has
a base chassis constructed around a midplane motherboard. All
optional switch cards are installed as modules and connect through
the midplane. The chassis also contains the modular cooling
fans, clock cards, and redundant power supplies.
clock box Quadrics QsNet
II
™ clock distribution box (AC023A) which provides
timing synchronization between federated interconnects.
clock card See controller card.
clock cable The QSNet
II
Clock cable links the clock box to an in-
terconnect’s clock card
controller card The controller card (also called a clock card) has an integral control
processor (AB998A). Each interconnect chassis can support up
to 2 clock cards, (clock A, clock B) installed in the middle slots
on each side of the chassis. The control processor provides a
management port that enables you to log in to and administer
an interconnect using a firmware interface.
federated To provide all the necessary links for the topology, clusters exceeding
128 nodes require an interconnect hierarchy of both node-level
and top-level interconnects. See also bounded.
host-bus adapter
(HBA)
Quadrics QsNet
II
™ QSNet PCI-X HBA rev B, copper (AB992A).
interconnect Quadrics QsNet
II
™ high-speed interconnect.
Overview of Quadrics-Based Clusters 1-1