AB379B - PCI-X Dual Channel 4Gb/s Fibre Channel Adapter Performance Paper for Integrity Servers
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System configuration guidelines
rx6600
The rx6600, with Montecito processors, offers up to 8 processor cores (4 dual-core processor modules), with
2 PCI-X 266 MHz slots, 2 PCI-X 133 MHz slots, and 4 PCI-X 66 MHz slots. HP recommends that the AB379B
be installed in one of the 266 Mhz slots (physical slot numbers 3 or 4) to achieve the performance shown in this
paper. The 133 Mhz slots (slot numbers 5 and 6) limit the overall throughput through the slot to about 820
MB/s, which is enough to maximize unidirectional throughput (reads or writes) through both ports of the
AB379B, but not enough to maximize bidirectional throughput (both reads and writes simultaneously) through
both ports. The 66 Mhz slots limit the slot throughput to about 490 MB/s.
The memory configuration in the rx6600 is also important. For maximum memory bandwidth, two memory
extenders should be used and equal capacity DIMMs should be evenly distributed across the two extenders in
multiples of 8 (4 per extender).
HP Integrity Superdome sx2000
HP Integrity Superdome sx2000 is a cell-based high-end Integrity server. Each sx2000 I/O Chassis offers
2 PCI-X 266 MHz slots, 6 PCI-X 133 MHz slots, and 4 PCI-X 66 Mhz slots. There can be up to four I/O
chassis’s in the main cabinet of the sx2000, and up to eight I/O Chassis’s in an I/O Expansion cabinet. The
sx2000 partition used in this paper contained three I/O chassis’s. The scalability tests used six AB379B
adapters, each in a 266 Mhz slot (two per I/O chassis). HP recommends that AB379B adapters be installed in
266 Mhz slots (physical slot numbers 5 and 6 in each I/O Chassis) to achieve the performance shown in this
paper.
Use of PCI-X 133 MHz or 66 MHz slots will have similar performance limitations to those mentioned above with
respect to the rx6600.
To get linear scalability as shown in this paper, each cell in the sx2000 Superdome partition should be
configured with a multiple of 8 equal capacity DIMMs to take advantage of memory interleaving. The 8 DIMMs
should be evenly distributed across the 2 busses.