NonStop NS-Series Planning Guide (H06.03+)
Introduction to Integrity NonStop NS-Series Systems
HP Integrity NonStop NS-Series Planning Guide—529567-004
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Processor Complex
Processor Complex
The basic building block of the NSAA compute engine is the processor complex, which
consists of two or three CPU modules called slices.
Each slice houses two or four microprocessors called processor elements (PEs). A
logical processor consists of one processor element from each slice. Although a logical
processor physically consists of multiple processor elements, with each element
contained in a separate enclosure, it is convenient to think of a logical processor as a
single entity within the system. Each logical processor has its own memory, its own
copy of the operating system, and processes a single instruction stream. NSAA logical
processors are usually referred to simply as processors.
All input and output to and from each slice goes through a logical synchronization unit
(LSU). The LSU interfaces with the ServerNet fabrics and contains logic that compares
all output operations of a logical processor, ensuring that all slices agree on the result
before the data is passed to the ServerNet fabrics.
A processor with two slices and their associated LSUs make up the dual modular
redundant (DMR) processor complex, which is also referred to as a duplex processor.
This duplex processor provides data integrity and system availability that is
comparable to NonStop S-series systems, but at considerably faster processing
speeds.
Three slices plus their associated LSUs make up the triple modular redundant (TMR)
processor complex, which is referred to as a triplex system. The triplex processor
provides the same processing speeds as the duplex processor while also enabling
hardware fault recovery that is transparent to all but the lowest level of the NonStop
operating system (OS).
In the event of a processor fault in either a duplex or triplex processor, the failed
component within a slice (processor element, power supply, and so forth), or the entire
slice, can be replaced while the system continues to run. A single Integrity NonStop
NS-series system can have up to four processor complexes for a total of 16
processors. Processors communicate with each other and with the system I/O over
dual ServerNet fabrics.
Note. In this publication, the term processor complex is equivalent to the term NonStop Blade
Complex (NSBC). In future revisions of this publication, processor complex will be replaced
with one of the following terms, as space permits:
•
NonStop Blade Complex
•
Blade Complex
•
NSBC
The term slice is equivalent to the term NonStop Blade Element (NSBE). In future revisions of
this publication, slice will be replaced with one of the following terms, as space permits:
•
NonStop Blade Element
•
Blade Element
•
NSBE










