NonStop NS-Series Planning Guide (H06.03+)

Introduction to Integrity NonStop NS-Series Systems
HP Integrity NonStop NS-Series Planning Guide—529567-004
1-5
Processor Element
In summary, these terms describe the NSAA processor:
Processor Element
Each of the two or four processor elements in a slice includes:
•
A standard Intel® Itanium® microprocessor running at 1.6 GHz with a 6-MB cache
•
4, 8, or 16 GB of main memory partitioned from DDR SDRAM DIMMs
•
I/O interface with maintenance logic shared with the other PEs in the slice
•
Interface for fiber-optic I/O communications with the corresponding LSU
•
Memory reintegration logic and fiber-optic links shared with the other PEs in the
slice and used for memory rendezvous between the slices
The diagram is an overview of the processor element architecture:
Duplex Processor
The DMR or duplex processor uses two slices, A and B, both with two or four
microprocessors. Slice optic cables connect the PEs to the LSUs. These LSUs then
connect to two independent ServerNet fabrics. These two connections create
Term Description
Processor
element (PE)
A single Itanium microprocessor with its associated memory. A PE is
capable of executing an individual instruction stream and I/O
communication through fiber-optic links.
Processor slice Two or four PEs contained within a single slice enclosure.
Logical
processor
One or more PEs from each slice executing a single instruction stream. A
duplex processor has two PEs forming a logical processor. A triplex
processor has three PEs.
Processor
complex
Two slices (duplex processor) or three slices (triplex processor). An
Integrity NonStop NS-series system includes up to four processor
complexes.
Slice enclosure The power, processor, memory, and I/O hardware for a complete slice. It
mounts in a 19-inch computer equipment rack.
VST747.vsd
I/O and Memory
Controller
Fiber-Optic
I/O 0-3
DIMM Main
Memory
Memory
Copy
Memory Reintegration
to Other Slices
Slice Optic
Link to LSUs
Memory
Reintegration From
Other Slices
Microprocessor
0-3
Logic shared by all
microprocessors in
slice
Logic dedicated to
microprocessor
0, 1, 2, or 3