NonStop NS-Series Planning Guide (H06.04+)

HP Integrity NonStop NS-Series Planning Guide—529567-005
4-1
4
Integrity NonStop NS-Series System
Description
This section describes the Integrity NonStop NS-series systems and covers these
topics:
NonStop System Primer
NonStop S-series systems cluster physically independent uniprocessor modules via
the ServerNet interconnect fabrics, with each logical uniprocessor consisting of a lock-
stepped pair of microprocessors. These lock-stepped processors share a single main
memory array plus an intelligent interface to a redundant pair of ServerNet fabrics. The
NonStop S-series architecture requires rigid, cycle-by-cycle deterministic operation of
every element plus the physical interface to support lockstep operation. It also provides
fault isolation between logical processors while allowing physical scaling (adding one
or two processors to the node at a time to increase performance).
Topic Page
NonStop System Primer
4-1
NonStop Advanced Architecture 4-2
NonStop Blade Complex 4-2
Processor Element 4-4
Duplex Processor 4-5
Triplex Processor 4-6
Processor Synchronization and Rendezvous 4-7
Memory Reintegration 4-8
Failure Recovery for Duplex Processor 4-8
Failure Recovery for Triplex Processor 4-8
ServerNet Fabric I/O 4-9
System Architecture 4-17
Modular Hardware 4-18
NonStop S-Series I/O Hardware 4-18
System Models 4-18
Default Startup Characteristics 4-18
Migration Considerations 4-20
System Installation Document Packet 4-23