NonStop NS-Series Planning Guide (H06.04+)

Integrity NonStop NS-Series System Description
HP Integrity NonStop NS-Series Planning Guide—529567-005
4-6
Triplex Processor
A duplex processor includes these elements:
Triplex Processor
The TMR or triplex processor uses three NonStop Blade Elements, A, B, and C. As
with the duplex processor, the optic cables connect the PEs to the LSUs, and these
LSUs then connect to the two independent ServerNet fabrics. Dual ServerNet fabrics
create communications redundancy in case one of the fabrics fails. For a description of
the LSU functions, see Processor Synchronization and Rendezvous on page 4-7.
VST303.vsd
LSU
Enclosure
NSBE B
NSBE A
NSBE (4-way
SMP server
includes PEs
A0, A1, A2, A3)
PE
A2
PE
B2
PE
A3
PE
B3
ServerNet Links to
Processor Switch
Fiber
Optic
Cables
Logical Processor 0
(includes PEs A0, B0)
NonStop Blade Element A0
(slice A, logical processor 0)
23
LSU 0
(for PEs A0, B0)
NonStop Balde
Complex 0
LSU 2
Vote
Logic
A B C
Optic
I/O
X Y
LSU 3
Vote
Logic
A B C
Optic
I/O
X Y
PE
A1
PE
B1
1
LSU 1
Vote
Logic
A B C
Optic
I/O
X Y
PE
A0
0
LSU 0
Vote
Logic
A B C
Optic
I/O
X Y
PE
B0