NonStop NS-Series Planning Guide (H06.04+)

Table Of Contents
Integrity NonStop NS-Series System Description
HP Integrity NonStop NS-Series Planning Guide529567-005
4-17
System Architecture
System Architecture
This diagram shows elements of an example Integrity NonStop NS-series system with
four triplex processors:
Fibre Channel
Disk Module
PE = processor element
VST737.vsd
Logical
Processor
0
Logical
Processor
1
Logical
Processor
2
Logical
Processor
3
LSU
CPU Slice
B
CPU Slice
A
CPU Slice
C
Slice Optic Cables
Processor
Switch on
X Fabric
PE
0
PE
0
PE
0
PE
1
PE
1
PE
1
PE
2
PE
2
PE
2
PE
3
PE
3
PE
3
A B C
LSU 0
A B C
LSU 1
A B C
X Y
LSU 2
A B C
X Y
LSU 3
X Y
X Y
I/O Adapter Module
ServerNet
Adapters
ServerNet
Adapters
Fibre Channel
ServerNet
Fabrics
X Fabric
Fibre Channel
Y Fabric
Triplex
Processor
Processor
Switch on
Y Fabric
High-Speed
Ethernet
High-Speed
Ethernet
S-Series
I/O Enclosure
I/O
S-Series
I/O Enclosure
I/O
/
4
/
4
Fibre Channel
Disk Module