NonStop NS-Series Planning Guide (H06.05+)

System Configuration Guidelines
HP Integrity NonStop NS-Series Planning Guide—529567-008
6-10
LSUs to Processor Switches and Processor IDs
This figure shows example connections to the default configuration of the NonStop
Blade Element reintegration links (NonStop Blade Element connectors S, T, Q, R) and
ports 1 to 4 on the p-switch PIC in slot 10, which defines triplex processor numbers to
0 to 3. Two p-switches are required: one for the X-fabric and the other for the Y-fabric:
NSBE 1C
(not used
in duplex
system)
NSBE 1A
NSBE 1B
LSU
Enclosure 0
20 272625242322
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
11 1310 12
B
A
X
C
B
A
X
C
B
A
Y
X
C
B
A
X
C
3
2
1
4
J1 J3 J5 J7 K1 K3 K5 K7
J0 J2 J4 J6 K0 K2 K4 K6
J1 J3 J5 J7 K1 K3 K5 K7
J0 J2 J4 J6 K0 K2 K4 K6
J1 J3 J5 J7 K1 K3 K5 K7
J0 J2 J4 J6 K0 K2 K4 K6
X Fabric
Processor
Switch
P-switch slot 10, port 1: Processor 0
P-switch slot 10, port 2: Processor 1
P-switch slot 10, port 3: Processor 2
P-switch slot 10, port 4: Processor 3
11 1310 12
Y Fabric
Processor
Switch
3
2
1
4
VST210.vsd
Y
Y
21
Y
S T Q R
S T Q R
S T Q R