NonStop NS-Series Planning Guide (H06.05+)

Integrity NonStop NS14000 System Description
HP Integrity NonStop NS-Series Planning Guide—529567-008
8-5
Triplex Processor
Triplex Processor
The Integrity NonStop NS14000 system implements a triplex processor (see Triplex
Processor on page 4-7) similarly to the Integrity NonStop NS16000 system, with these
exceptions.
•
Logical synchronization units (LSUs) connect directly to 4PSEs in the IOAM
enclosure. Unlike the Integrity NonStop NS16000 system, the Integrity NonStop
NS14000 system does not use p-switches.
•
An Integrity NonStop NS14000 system supports up to a maximum of eight logical
processors in two NonStop Blade Complexes.
Processor Synchronization and Rendezvous
Processor synchronization and rendezvous are implemented the same in the Integrity
NonStop NS14000 system as in the Integrity NonStop NS16000 system. See
Processor Synchronization and Rendezvous on page 4-8.
Memory Reintegration
Memory reintegration is implemented the same in the Integrity NonStop NS14000
system as in the Integrity NonStop NS16000 system. See Memory Reintegration on
page 4-8.
Failure Recovery for Duplex Processor
Failure recovery for duplex processors is handled the same in the Integrity NonStop
NS14000 system as in the Integrity NonStop NS16000 system. See Failure Recovery
for Duplex Processor on page 4-8.
Failure Recovery for Triplex Processor
Failure recovery for triplex processors is handled the same in the Integrity NonStop
NS14000 system as in the Integrity NonStop NS16000 system. See Failure Recovery
for Triplex Processor on page 4-9.