NonStop NS14000 Planning Guide (H06.10+)

4 Integrity NonStop NS14000 System Description
NonStop Advanced Architecture
Integrity NonStop NS14000 systems employ a unique method for achieving fault tolerance in a
clustered processor environment: the modular NonStop advanced architecture (NSAA). NSAA
utilizes standard Intel Itanium microprocessors, without cycle-by-cycle lock-stepping. Instead,
two or three microprocessors run the same instruction stream concurrently in a loose lockstep
process. In loose lockstep:
• Each microprocessor runs at its own clock rate.
• Results of each command execution are compared on processor output to the ServerNet
fabric.
• Error recovery and minor indeterminate processing results from one microprocessor do not
cause output comparison errors.
If the output of one microprocessor is incorrect, it is discarded, and its source microprocessor is
taken offline for error handling and correction. The remaining functional hardware continues
normal operation until the errant microprocessor is again operational. At that time, all
microprocessors are synchronized and then proceed with executing instructions.
NSAA and Integrity NonStop NS14000 systems use modular hardware implemented in enclosures
with fiber-optic cabling between these enclosures. These enclosures reside in 19-inch modular
cabinets.
NonStop Blade Complex
The basic building block of the NSAA compute engine is the NonStop Blade Complex, which
consists of two or three CPU modules called NonStop Blade Elements. Each NonStop Blade
Element houses two or four microprocessors called processor elements (PEs). A logical processor
consists of one processor element from each NonStop Blade Element plus a logical synchronization
unit (LSU). Although a logical processor physically consists of multiple processor elements, with
each element contained in a separate enclosure, it is convenient to think of a logical processor as
a single entity within the system. Each logical processor has its own memory and its own copy
of the operating system, and it processes a single self-checked instruction stream. NSAA logical
processors are usually referred to simply as processors.
All input and output to and from each NonStop Blade Element goes through a logical
synchronization unit (LSU). The LSU interfaces with the ServerNet fabrics and contains logic
that compares all output operations of the PEs in a logical processor, ensuring that all NonStop
Blade Elements agree on the result before the data is passed to the ServerNet fabrics.
A processor with two NonStop Blade Elements (NSBEs) and their associated LSUs makes up the
dual modular redundant (DMR) NonStop Blade Complex, which is also referred to as a duplex
processor. This duplex processor provides data integrity and system availability that is comparable
to NonStop S-series systems but at considerably faster processing speeds.
Three NonStop Blade Elements plus their associated LSUs make up the triple modular redundant
(TMR) NonStop Blade Complex, which is referred to as a triplex system. The triplex processor
provides the same processing speeds as the duplex processor but also enables hardware fault
recovery that is transparent to all but the lowest level of the HP NonStop operating system (OS).
This diagram provides an overview of the modular NSAA and shows one NonStop Blade Complex
with four processors, two VIO enclosures (the I/O hardware), and links to external I/O and
storage:
NonStop Advanced Architecture 35