NonStop NS14000 Series Planning Guide (H06.13+)

In summary, these terms describe the NonStop NS14000 series processor:
DescriptionTerm
A single Itanium microprocessor with its associated memory. A PE is capable of
executing an individual instruction stream and I/O communication through fiber-optic
links.
Processor element (PE)
Two or four PEs contained within a single NonStop Blade Element enclosure.NonStop Blade Element
One or more PEs from each NonStop Blade Element executing a single instruction
stream. A duplex processor has two PEs forming a logical processor. A triplex
processor has three PEs.
Logical processor
Two NonStop Blade Elements (duplex processor) or three NonStop Blade Elements
(triplex processor). A NonStop NS14000 series system includes up to two NonStop
Blade Complexes.
NonStop Blade Complex
The power, processor, memory, and I/O hardware for a complete NonStop Blade
Element. It mounts in a 19-inch modular cabinet.
NonStop Blade Element
enclosure
Processor Element
Each of the two or four processor elements in a NonStop Blade Element includes:
• An Intel Itanium microprocessor:
NSE-D processors ship with the NonStop NS14000 server.◦
◦ NSE-S processors ship with the NonStop NS14200 server.
• 4 GB or 8 GB of main memory partitioned from DDR SDRAM DIMMs
• I/O interface with maintenance logic shared with the other PEs in the NonStop Blade Element
• Interface for fiber-optic I/O communications with the corresponding LSU
• Memory reintegration logic and fiber-optic links shared with the other PEs in the NonStop
Blade Element and used for memory rendezvous between the NonStop Blade Elements
This diagram provides an overview of the processor element architecture:
Duplex Processor
The DMR or duplex processor uses two NonStop Blade Elements, A and B, both with two or four
microprocessors. Fiber-optic cables from each NonStop Blade Element connect the PEs to the LSUs.
These LSUs then connect to two independent ServerNet fabrics via the VIO enclosures. These
connections create communications redundancy in case one of the fabrics fails. For a description
of the LSU functions, see “Processor Synchronization and Rendezvous” (page 107).
A duplex processor includes these elements:
Processor Element 105