Installation Guide, Third Edition - HP Integrity rx2620 (August 2006)

Introduction
System Board Components
Chapter 1
24
Dual Serial Controller
The dual serial controller is a dual universal asynchronous receiver and transmitter (DUART). This chip
provides enhanced UART functions with 16-byte first-in, first-out (FIFO) processing. Registers on this chip
provide onboard error indications and operation status. An internal loopback capability provides onboard
diagnostics.
Features include:
• Data rates up to 115.2 kbps
• 16550A fully compatible controller
• A 16-byte transmit FIFO to reduce the bandwidth requirement of the external CPU
• A 16-byte receive FIFO with four selectable interrupt trigger levels and error flags to reduce the
bandwidth requirement of the external CPU
• UART control that provides independent transmit and receive
• Modem control signals (-CTS, -RTS, -DSR, -DTR, -RI, -CD, and software controllable line break)
• Programmable character lengths (5, 6, 7, 8) with Even, Odd or No Parity
• A status report register
Field Programmable Gate Array
The field programmable gate array (FPGA) provides ACPI and LPC support for the PDH bus and provides
these features:
• ACPI 2.0 interface
• LPC bus interface to support BMC
• Decoding logic for PDH devices
Baseboard Management Controller
The baseboard management controller (BMC) supports the industry-standard IPMI specification. This
specification describes the management features that have been built into the system board. These features
include: local and remote diagnostics, console support, configuration management, hardware management,
and troubleshooting.
The BMC provides the following:
• Compliance with IPMI 1.0
• Tachometer inputs for fan speed monitoring
• Pulse width modulator outputs for fan speed control
• Push-button inputs for front panel buttons and switches
• One serial port, multiplexed with the sever console port
• Remote access and intelligent chassis management bus (ICMB) support